component
74AUP2G132DC
Public Made by Adomby adom
Nexperia Logic Gates, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74AUP2G132DC
Nexperia · Logic Gates · VSSOP-8-0.5mm
74AUP2G132DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of the first NAND Schmitt-trigger gate; the input is overvoltage tolerant to 3.6 V and the recommended input voltage range is 0 V to 3.6 V. |
| 2 | 1B | input | Data input 1B of the first NAND Schmitt-trigger gate; the input is overvoltage tolerant to 3.6 V and the recommended input voltage range is 0 V to 3.6 V. |
| 3 | 2Y | output | Data output of the second NAND gate; in active mode the output voltage range is 0 V to VCC, and the IOFF circuitry disables the output when the device is powered down. |
| 4 | GND | power_in | Ground (0 V) reference for all device voltages. |
| 5 | 2A | input | Data input 2A of the second NAND Schmitt-trigger gate; the input is overvoltage tolerant to 3.6 V and the recommended input voltage range is 0 V to 3.6 V. |
| 6 | 2B | input | Data input 2B of the second NAND Schmitt-trigger gate; the input is overvoltage tolerant to 3.6 V and the recommended input voltage range is 0 V to 3.6 V. |
| 7 | 1Y | output | Data output of the first NAND gate; in active mode the output voltage range is 0 V to VCC, and the IOFF circuitry disables the output when the device is powered down. |
| 8 | VCC | power_in | Supply voltage, recommended range 0.8 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | VSSOP-8-0.5mm |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
74AUP2G132DC - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
- 3D model files:
74aup2g132dc-etched.step/74aup2g132dc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74aup2g132dc.step/74aup2g132dc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (21 pp, sha256
eca83df456d40cd2, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).