component
LM43603PWP
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM43603PWP
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
LM43603PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor. |
| 2 | SW | output | Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor. |
| 3 | CBOOT | power_in | Bootstrap capacitor connection for high-side gate driver charged from SW with a maximum voltage rating of 5.5 V relative to SW. |
| 4 | VCC | power_out | Internal bias supply output rated to 3.6 V maximum that requires bypass capacitor to AGND and must never be shorted to ground during operation. |
| 5 | BIAS | power_in | Optional external LDO supply input accepting 3.3 V to 28 V (or external 3.3/5 V rail) with 1-10 µF bypass capacitor when used, or tie to ground when not used. |
| 6 | SYNC | input | Clock input to synchronize switching action to external clock (−0.3 V to 5.5 V) with proper high-speed termination required to prevent ringing. |
| 7 | RT | input | Frequency programming resistor connection to AGND that programs switching frequency from 200 kHz to 2.2 MHz (default 500 kHz when floating). |
| 8 | PGOOD | tri_state | Open-drain power-good flag output rated to 15 V maximum requiring 10 kΩ to 100 kΩ pullup resistor to logic rail ≤ 12 V. |
| 9 | FB | input | Feedback sense input pin (−0.3 V to 1.1 V) connected to resistor divider for output voltage setting that must not be shorted to ground. |
| 10 | AGND | power_in | Analog ground reference for internal references and logic that requires low-impedance connection to system ground and PAD. |
| 11 | SS/TRK | input | Soft-start control pin that can be left floating for 4.1 ms internal ramp, connected to capacitor to extend ramp, or driven by external voltage for tracking. |
| 12 | EN | input | Enable input (high = ON, low = OFF) for regulator and internal LDO that must connect to VIN, divider, or external logic source and never float. |
| 13 | VIN | power_in | Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors. |
| 14 | VIN | power_in | Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors. |
| 15 | PGND | power_in | Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT. |
| 16 | PGND | power_in | Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LM43603PWP - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
lm43603pwp-etched.step/lm43603pwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm43603pwp.step/lm43603pwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (59 pp, sha256
2642edca40e62388, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).