component
SGM61432XPS8G
Public Made by Adomby adom
SGMICRO DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSGM61432XPS8G
SGMICRO · DC-DC Converters · SOIC-8-EP
SGM61432XPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap input for the N-MOSFET gate driver supply; connect a 0.1μF ceramic capacitor to the SW pin, and the MOSFET turns off if the capacitor voltage drops below the BOOT-UVLO level. |
| 2 | VIN | power_in | Supply input for 4V to 40V; decouple to GND close to the catch diode anode and the device with a low ESR ceramic capacitor (X5R or higher grade). |
| 3 | EN | input | Active-high enable input; float or pull up to VIN to enable, pull down below 1.11V to disable, and a resistor divider from VIN can program the input UVLO level. |
| 4 | RT/CLK | input | Resistor timing and external clock input; switching frequency is set by the external RT resistor or an external SYNC clock. |
| 5 | FB | input | Feedback pin for setting the output voltage; regulated to 0.75V, connect a feedback resistor divider tap here. |
| 6 | SS | passive | Soft-start control pin; connect an external capacitor (CSS) between this pin and GND to set the soft-start time. |
| 7 | GND | power_in | Ground pin. |
| 8 | SW | power_out | Switching node of the converter (source of the internal MOSFET); connect to the catch diode cathode, the bootstrap capacitor and the inductor. |
| 9 | EP | power_in | Exposed pad that helps cool the device junction and must be connected to GND for proper operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8-EP |
| Category | Power Supply Chip |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operation Input Voltage | VIN | 4 | 40 | V | TJ = -40℃ to +125℃ | 4 | |
| Under-Voltage Lockout Threshold | VUVLO | 3.68 | 3.85 | 4 | V | Rising threshold | 4 |
| Shutdown Supply Current | ISHDN | 1.3 | 3.8 | μA | TJ = +25℃, 4.0V ≤ VIN ≤ 40V, VEN = 0V | 4 | |
| EN Threshold Voltage rising | VENH | 1.19 | 1.27 | V | VEN rising | 4 | |
| EN Threshold Voltage falling | VENL | 1.05 | 1.11 | V | VEN falling | 4 | |
| Feedback Voltage | VFB | 0.745 | 0.75 | 0.765 | V | TJ = +25℃ | 4 |
| Feedback Voltage | VFB | 0.739 | 0.75 | 0.769 | V | TJ = -40℃ to +125℃ | 4 |
| High-side MOSFET On-Resistance | RDSON | 93 | 150 | mΩ | VIN = 12V, VBOOT to VSW = 5V | 4 | |
| Current Limit | ILIMT | 4.4 | 5.1 | 5.8 | A | TJ = +25℃, VIN = 12V, close-loop | 4 |
| Switching Frequency | fSW | 470 | 500 | 530 | kHz | RT = 49.9kΩ, 1% accuracy | 4 |
| UVLO Hysteresis | VUVLO_HYS | 255 | mV | 4 | |||
| Quiescent Current | IQ | 38 | μA | TJ = +25℃, VIN = 12V, VFB = 1V | 4 | ||
| EN Hysteresis | VEN_HYS | 80 | mV | Hysteresis | 4 | ||
| EN Input Current | IEN_PIN | -4.4 | μA | Enable threshold +50mV | 4 | ||
| EN Input Current | IEN_PIN | -1 | μA | Enable threshold -50mV | 4 | ||
| EN Hysteresis Current | IEN_HYS | -3.4 | μA | 4 | |||
| SS Pin Current | ISS | 3 | μA | TJ = +25℃ | 4 | ||
| Thermal Shutdown Threshold | TSHDN | 175 | ℃ | 4 | |||
| Thermal Shutdown Hysteresis | THYS | 20 | ℃ | 4 | |||
| SYNC Clock High Level Threshold | VSYNC_HI | 1.7 | V | 4 | |||
| SYNC Clock Low Level Threshold | VSYNC_LO | 0.7 | V | 4 | |||
| Minimum SYNC Input Pulse Width | TSYNC_MIN | 30 | ns | Measured at 500kHz, VSYNC_HI > 3V, VSYNC_LO < 0.3V | 4 | ||
| PLL Lock in Time | tLOCK_IN | 100 | µs | Measured at 500kHz | 4 | ||
| Minimum Controllable on Time | tON_MIN | 85 | ns | 4 | |||
| Maximum Duty Cycle | DMAX | 97 | % | fSW = 200kHz | 4 | ||
| VIN, EN to GND | -0.3 | 44 | V | 2 | |||
| BOOT to GND | -0.3 | 50 | V | 2 | |||
| SS to GND | -0.3 | 5 | V | 2 | |||
| FB to GND | -0.3 | 6 | V | 2 | |||
| RT/CLK to GND | -0.3 | 3.6 | V | 2 | |||
| BOOT to SW | 6 | V | 2 | ||||
| SW to GND | -0.6 | 44 | V | 2 | |||
| SW to GND (10ns Transient) | -3.5 | 44 | V | 10ns transient | 2 | ||
| Junction Temperature | TJ | 150 | ℃ | 2 | |||
| Storage Temperature Range | -65 | 150 | ℃ | 2 | |||
| Lead Temperature | 260 | ℃ | Soldering, 10s | 2 | |||
| Input Voltage Range | VIN | 4 | 40 | V | 2 | ||
| Switching Frequency Range at RT Mode | fSW | 200 | 2500 | kHz | RT mode | 2 | |
| Switching Frequency Range at SYNC Mode | fSW | 250 | 2300 | kHz | SYNC mode | 2 | |
| Operating Junction Temperature Range | TJ | -40 | 125 | ℃ | 2 | ||
| Package Thermal Resistance | θJA | 41 | ℃/W | SOIC-8 (Exposed Pad) | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | Connect the device GND pin directly to the exposed pad (Power Pad) copper area under the | 16 |
CAD (KiCad official)
- Symbol:
SGM61432XPS8G - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
sgm61432xps8g-etched.step/sgm61432xps8g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm61432xps8g.step/sgm61432xps8g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (20 pp, sha256
8b5a6ba5fae0b0e6, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).