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Contents

README

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MAX14841EASA+T

Analog Devices Inc Maxim Integrated · RS-485 / RS-422 ICs · SOIC-8

MAX14841EASA+T from Analog Devices Inc Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output; RO is high impedance when RE is high, and the datasheet states it is logic-high when the receiver differential input VOD is at or above -10mV on the MAX14841E.
2 RE input Active-low receiver output enable: driving RE low enables RO, and driving RE high with DE low puts the device into low-power shutdown mode (under 10µA supply current); RE is a hot-swap input.
3 DE input Driver output enable: driving DE high enables the driver outputs, which are high impedance when DE is low; DE is a hot-swap input and driving RE high with DE low enters shutdown.
4 DI input Driver input: with DE high, a low on DI forces output A low and output B high, and a high on DI forces A high and B low.
5 GND power_in Ground reference for the device; all voltages are referenced to this pin.
6 A bidirectional Noninverting receiver input and noninverting driver output; the absolute maximum rating for A and B is -8.0V to +13.0V referenced to GND.
7 B bidirectional Inverting receiver input and inverting driver output; the absolute maximum rating for A and B is -8.0V to +13.0V referenced to GND.
8 VCC power_in Positive supply voltage input, specified at 3.0V to 3.6V; bypass VCC to GND with a 0.1µF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VCC) VCC -0.3 6 V Voltages referenced to GND 2
Receiver output / enable pins (RE, RO) voltage RE, RO -0.3 V Upper limit printed as VCC + 0.3V 2
Driver input / enable pins (DE, DI) voltage DE, DI -0.3 6 V Voltages referenced to GND 2
Bus pins (A, B) voltage A, B -8 13 V Voltages referenced to GND 2
Continuous Power Dissipation (8-Pin SO) PD 606 mW TA = +70°C 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (soldering, 10s) 300 °C Soldering, 10s 2
Soldering Temperature (reflow) 260 °C Reflow 2
Operating Temperature Range TA -40 125 °C Note 2 (junction up to +150°C) 2
Supply Voltage VCC 3 3.6 V 2
Supply Current ICC 1.5 4 mA DE = RE = VCC, or DE = RE = GND, or DE = VCC, RE = GND, DI = VCC or GND, no load 2
Shutdown Supply Current ISH 10 µA DE = GND and RE = VCC 2
Differential Driver Output VOD 1.5 V RL = 54Ω, Figure 1 2
Change in Magnitude of Differential Output Voltage DVOD -0.2 0 0.2 V RL = 54Ω, Figure 1 (Note 5) 2
Driver Common-Mode Output Voltage VOC 3 V RL = 54Ω, Figure 1 2
Change in Common-Mode Voltage DVOC -0.2 0.2 V RL = 54Ω, Figure 1 (Note 5) 2
Single-Ended Driver Output High VOH 2.2 V A/B output, IOUT = -20mA 2
Single-Ended Driver Output Low VOL 0.8 V A/B output, IOUT = 20mA 2
Driver Short-Circuit Output Current /IOSD/ 250 mA 0V ≤ VOUT ≤ +12V, output low 2
Input Current (A and B) IA,B 1000 µA DE = GND, VCC = GND or +3.6V, VIN = +12V 2
Input Current (A and B) IA,B -800 µA DE = GND, VCC = GND or +3.6V, VIN = -7V 2
Receiver Differential Threshold Voltage (MAX14841E Only) VTH -200 -105 -10 mV -7V ≤ VCM ≤ 12V 3
Receiver Input Hysteresis (MAX14841E Only) ΔVTH 10 mV VCM = 0V 3
Input High Voltage (DE, DI) VIH 2 5.5 V DE, DI 3
Input High Voltage (RE) VIH 2 V RE 3
Input Low Voltage VIL 0.8 V DE, DI, RE 3
Input Hysteresis VHYS 50 mV DE, DI, RE 3
Input Current IIN -1 1 µA DE, DI, RE 3
Input Impedance on First Transition 1 10 kΩ DE, RE 3
Output Low Voltage (receiver) VOL 0.4 V RE = GND, IO = 1mA, VA - VB < -200mV 3
Three-State Output Current at Receiver IOZR -1 1 µA RE = VCC, 0V ≤ VO ≤ VCC 3
Receiver Output Short-Circuit Current IOSR -95 95 mA 0V ≤ VRO ≤ VCC 3
ESD Protection: A, B to GND, HBM -35 35 kV HBM, JEDEC JS-001-2012 3
ESD Protection: A, B to GND, IEC 61000-4-2 Air Gap Discharge -20 20 kV IEC 61000-4-2 Air Gap Discharge 3
ESD Protection: A, B to GND, IEC 61000-4-2 Contact Discharge -12 12 kV IEC 61000-4-2 Contact Discharge 3
ESD Protection: All Other Pins, HBM -2 2 kV HBM 3
Driver Propagation Delay (tDPLH) tDPLH 5 12 20 ns RL = 54Ω, CL = 50pF, Figures 2 and 3 (Note 6) 3
Driver Propagation Delay (tDPHL) tDPHL 5 12 20 ns RL = 54Ω, CL = 50pF, Figures 2 and 3 (Note 6) 3
Differential Driver Output Skew /tDPLH - tDPHL/ 2 ns RL = 54Ω, CL = 50pF, Figures 2 and 3 (Notes 6, 9) 3
Driver Differential Output Rise or Fall Time tHL, tLH 7.5 ns RL = 54Ω, CL = 50pF, Figures 2 and 3 (Notes 6, 9) 4
Maximum Data Rate (driver) DRMAX 40 Mbps 4
Driver Enable to Output High tDZH 30 ns RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 6, 7) 4
Driver Enable to Output Low tDZL 30 ns RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 6, 7) 4
Driver Disable Time from Low tDLZ 30 ns RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 6, 7) 4
Driver Disable Time from High tDHZ 30 ns RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 5, 6) 4
Driver Enable from Shutdown to Output Low tDZL(SHDN) 4 µs RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 6, 7) 4
Driver Enable from Shutdown to Output High tDZH(SHDN) 4 µs RL = 110Ω, CL = 50pF, Figures 4 and 5 (Notes 6, 7) 4
Time to Shutdown tSHDN 50 800 ns Note 8 4
Receiver Propagation Delay (tRPLH) tRPLH 25 ns CL = 15pF, Figures 6 and 7 (Note 6) 4
Receiver Propagation Delay (tRPHL) tRPHL 25 ns CL = 15pF, Figures 6 and 7 (Note 6) 4
Receiver Output Skew tRSKEW 2 ns CL = 15pF, Figures 6 and 7 (Notes 6, 9) 4
Receiver Enable to Output High tRZH 20 ns RL = 1kΩ, CL = 15pF, Figure 8 (Notes 6, 7) 4
Receiver Enable to Output Low tRZL 20 ns RL = 1kΩ, CL = 15pF, Figure 8 (Notes 6, 7) 4
Receiver Disable Time from Low tRLZ 20 ns RL = 1kΩ, CL = 15pF, Figure 8 (Notes 6, 7) 4
Receiver Disable Time from High tRHZ 20 ns RL = 1kΩ, CL = 15pF, Figure 8 (Notes 6, 7) 4

CAD (KiCad official)

  • Symbol: MAX14841EASA+T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max14841easa-t-etched.step / max14841easa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max14841easa-t.step / max14841easa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (16 pp, sha256 6bfa509840509451, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF