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README

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RK805-2

Rockchip · Power Management - Specialized · QFN-32-EP(4x4)

RK805-2 from Rockchip, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Power on or power off enable pin, active high, with an internal 800k resistor pulled low to ground.
2 SLEEP input Sleep mode control input.
3 LDO1 power_out LDO1 regulator output, adjustable 0.8 V to 3.4 V in 100 mV steps, rated 300 mA with VCC5=5 V.
4 VCC5 power_in Power supply of LDO1/LDO2, input range 2.0 V to 5.5 V.
5 LDO2 power_out LDO2 regulator output, adjustable 0.8 V to 3.4 V in 100 mV steps, rated 300 mA with VCC5=5 V.
6 INT output Interrupt request pin, open drain; absolute maximum voltage on this pin is 4 V.
7 SCL input I2C clock input (7-bit slave address 0011000, up to 1 MHz SCL clock frequency).
8 SDA bidirectional I2C data input and output.
9 RESETB input Reset pin after power on, active low; absolute maximum voltage on this pin is 4 V.
10 FB2 input Output feedback voltage of buck2, adjustable 0.7125 V to 2.300 V.
11 SW2 output Switching node of buck2; rated output current 2.5 A.
12 VCC2 power_in Power supply of buck2, input range 2.7 V to 5.5 V.
13 VCC1 power_in Power supply of buck1, input range 2.7 V to 5.5 V.
14 SW1 output Switching node of buck1; rated output current 2.5 A.
15 FB1 input Output feedback voltage of buck1, adjustable 0.7125 V to 2.300 V.
16 OUT1 output General digital output pin 1, CMOS level output; the datasheet text states the high level is 'VFB4' (sentence truncated in the source); absolute maximum voltage on this pin is 4 V.
17 OUT2 output General digital output pin 2, CMOS level output; the datasheet text states the high level is 'VFB4' (sentence truncated in the source); absolute maximum voltage on this pin is 4 V.
18 XIN input 32.768 kHz crystal oscillator input.
19 XOUT output 32.768 kHz crystal oscillator output.
20 VREF power_in Internal reference voltage; the datasheet typical application connects a 0.1 uF capacitor to REFGND.
21 REFGND power_in Reference ground.
22 VCCA power_in Power supply of the controller, operating range 2.8 V to 5.5 V.
23 VCC6 power_in Power supply of LDO3, input range 2.0 V to 5.5 V.
24 LDO3 power_out LDO3 regulator output, adjustable 0.8 V to 3.4 V in 100 mV steps, rated 100 mA with VCCA=5 V.
25 CLK32K output 32.768 kHz clock output, open drain.
26 FB4 input Output feedback voltage of buck4, adjustable 0.8 V to 3.5 V in 100 mV steps.
27 SW4 output Switching node of buck4; rated output current 1.5 A.
28 VCC4 power_in Power supply of buck4, input range 2.7 V to 5.5 V.
29 VCC3 power_in Power supply of buck3, input range 2.7 V to 5.5 V.
30 SW3 output Switching node of buck3; rated output current 1.5 A.
31 FB3 input Output feedback voltage of buck3, feedback voltage 0.800 V typical (0.784 V to 0.816 V).
32 PWRON input Power on key input, active low, with an internal 17k resistor pulled high to VCCA.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Rockchip
Package QFN-32-EP(4x4)
Category Power Management (PMIC)
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage range on pins VCCx, SWx, FBx -0.3 6.5 V 13
Voltage range on pins LDOx, VREF -0.3 6.5 V 13
Voltage range on pin CLK32K, SLEEP -0.3 6.5 V 13
Voltage range on pins XIN, XOUT, EN, PWRON -0.3 13
Voltage range on pins RESETB, INT, SDA, SCL, OUT1, OUT2 -0.3 4 V 13
Storage temperature range TS -40 150 ℃ 13
Operating temperature range TJ -40 125 ℃ 13
Maximum Soldering Temperature TSOLDER 300 ℃ 13
Voltage range on pins VCCx 2.7 5 5.5 V 13
Voltage range on other pins 5.5 V 13
Power Dissipation 2.7 W 13
VCCA Operating Range VVCCA 2.8 5 5.5 V 13
VCCA over voltage protect VVCCA_ov 6 V 13
Input supply voltage range (Buck 1) VCC1 2.7 5.5 V 13
Voltage Adjustable Range, 6bit (Buck 1) VFB1 0.7125 2.3 V 0.7125V~1.45V (Step=12.5mV)/1.8V/2.0V/2.2V/2.3V 13
Rated output current (Buck 1) IMAX1 2.5 A 13
Input supply voltage range (Buck 2) VCC2 2.7 5.5 V 14
Voltage Adjustable Range, 6bit (Buck 2) VFB2 0.7125 2.3 V 0.7125V~1.45V (Step=12.5mV)/1.8V/2.0V/2.2V/2.3V 14
Rated output current (Buck 2) IMAX2 2.5 A 14
Input supply voltage range (Buck 3) VCC3 2.7 5.5 V 14
Feedback Voltage (Buck 3) VFB3 0.784 0.8 0.816 V 14
Rated output current (Buck 3) IMAX3 1.5 A 14
Input supply voltage range (Buck 4) VCC4 2.7 5.5 V 14
Voltage Adjustable Range, 5bit (Buck 4) VFB4 0.8 3.5 V Step=100mV 14
Rated output current (Buck 4) IMAX4 1.5 A 14
Input supply voltage range (LDO1) VCC5 2 5.5 V 14
VOUT Output Voltage Adjustable Range, 5bit (LDO1) VLDO1 0.8 3.4 V Step=100mV 14
Rated output current (LDO1) IMAX5 300 mA VCC5=5V 14
Input supply voltage range (LDO2) VCC5 2 5.5 V 14
VOUT Output Voltage Adjustable Range, 5bit (LDO2) VLDO2 0.8 3.4 V Step=100mV 14
Rated output current (LDO2) IMAX6 300 mA VCC5=5V 14
Input supply voltage range (LDO3) VCC6 2 5.5 V 14
VOUT Output Voltage Adjustable Range, 5bit (LDO3) VLDO3 0.8 3.4 V Step=100mV 14
Rated output current (LDO3) IMAX7 100 mA VCCA=5V 14
SCL clock frequency fSCL 1 MHz 14
RTC operation voltage 2.5 5.5 V 14
CLK32K duty 40 60 % 14
VCCA under voltage protect VVCCA_uv 2.7 V Step=0.1V, from 2.7V to 3.4V programmable 13
VCCA low voltage alarm VVCCA_lv 3.3 V Step=0.1V, from 2.8V to 3.5V programmable 13
VCCA OK voltage threshold VVCCA_OK 3 V 2.8V/3.0V/3.4V/3.6V OTP programmable 13
Power supply reject ratio (f=1kHz) (LDO1) PSRR1 50 dB VCC5=5V,VLDO1=1V 14
Drop-out voltage @ 300mA (LDO1) Vdrop-out1 200 mV VLDO1=3.4V 14
Power supply reject ratio (f=1kHz) (LDO2) PSRR2 50 dB VCC5=5V,VLDO2=1.8V 14
Drop-out voltage @ 300mA (LDO2) Vdrop-out2 200 mV VLDO2=3.4V 14
Power supply reject ratio (f=1kHz) (LDO3) PSRR3 70 dB VCCA=5V,VLDO3=1.0V 14
Drop-out voltage @ 100mA (LDO3) Vdrop-out3 200 mV VLDO3=3.4V 14
CLK32K Jitter 100 nS 14
Reference and system ready 1st channel enable delay Ton1 6 ms 17
1st channel enable delay to 2nd channel enable delay Ton2 2 ms 17
2nd channel enable to 3rd channel enable delay Ton3 2 ms 17
3rd channel enable to 4th channel enable delay Ton4 2 ms 17
4th channel enable to 5th channel enable delay Ton5 2 ms 17
5th channel enable to RESET enable delay @ RK805-1/2 Ton7 10 ms 17
RESETB falling delay to supplies disable delay Toff2 2 ms 17
Thermal resistance junction-to-ambient θJA 45 ℃/W Power 2 W; 4-layer PCB 114mm x 76mm, 1.6mm; ambient 85°C 38
Thermal resistance junction-to-board θJB 21 ℃/W Power 2 W; 4-layer PCB 114mm x 76mm, 1.6mm; ambient 85°C 38
Thermal resistance junction-to-case θJC 2 ℃/W Power 2 W; 4-layer PCB 114mm x 76mm, 1.6mm; ambient 85°C 38

CAD (KiCad official)

  • Symbol: RK805-2
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: rk805-2-etched.step / rk805-2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rk805-2.step / rk805-2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Rockchip datasheet (38 pp, sha256 46ca9bd0d031b3eb, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF