Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SQ1431EH-T1_GE3

Vishay Intertech · MOSFETs · SOT-363

SQ1431EH-T1_GE3 from Vishay Intertech, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain of the P-channel MOSFET (VDS max -30 V), internally common with the other drain pins 2, 5 and 6.
2 D passive Drain of the P-channel MOSFET (VDS max -30 V), internally common with the other drain pins 1, 5 and 6.
3 G input Gate of the P-channel MOSFET, with a gate-source voltage limit of ±20 V and threshold of -1 V to -2 V.
4 S passive Source of the P-channel MOSFET, with continuous source current (diode conduction) of -3.7 A.
5 D passive Drain of the P-channel MOSFET (continuous drain current -3 A at TC = 25 °C), internally common with the other drain pins 1, 2 and 6.
6 D passive Drain of the P-channel MOSFET (continuous drain current -3 A at TC = 25 °C), internally common with the other drain pins 1, 2 and 5.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-363
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -3 A TC = 25 °C 1
Continuous Drain Current ID -1.8 A TC = 125 °C 1
Continuous Source Current (Diode Conduction) IS -3.7 A 1
Pulsed Drain Current IDM -12 A Pulse test, pulse width ≤ 300 μs, duty cycle ≤ 2 % (note a) 1
Single Pulse Avalanche Current IAS -6 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 1.8 mJ 1
Maximum Power Dissipation PD 3 W TC = 25 °C 1
Maximum Power Dissipation PD 1 W TC = 125 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Junction-to-Ambient PCB Mount RthJA 130 °C/W PCB mount, mounted on 1 in square PCB (FR4), note b 1
Junction-to-Foot (Drain) RthJF 50 °C/W 1
Drain-Source Breakdown Voltage VDS -30 V VGS = 0 V, ID = -250 μA 2
Gate-Source Threshold Voltage VGS(th) -1 -1.5 -2 V VDS = VGS, ID = -250 μA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero Gate Voltage Drain Current IDSS -1 μA VGS = 0 V, VDS = -30 V 2
Zero Gate Voltage Drain Current IDSS -50 μA VGS = 0 V, VDS = -30 V, TJ = 125 °C 2
Zero Gate Voltage Drain Current IDSS -150 μA VGS = 0 V, VDS = -30 V, TJ = 175 °C 2
On-State Drain Current ID(on) -5 A VGS = -10 V, VDS ≤ -5 V (≤ glyph not extracted; printed as VDS -5 V) 2
Drain-Source On-State Resistance RDS(on) 0.125 0.175 Ω VGS = -10 V, ID = -2 A 2
Drain-Source On-State Resistance RDS(on) 0.252 Ω VGS = -10 V, ID = -2 A, TJ = 125 °C 2
Drain-Source On-State Resistance RDS(on) 0.294 Ω VGS = -10 V, ID = -2 A, TJ = 175 °C 2
Drain-Source On-State Resistance RDS(on) 0.23 0.3 Ω VGS = -4.5 V, ID = -1.6 A 2
Input Capacitance Ciss 164 205 pF VGS = 0 V, VDS = -25 V, f = 1 MHz 2
Output Capacitance Coss 44 55 pF 2
Reverse Transfer Capacitance Crss 28 35 pF 2
Total Gate Charge Qg 4.2 6.5 nC VGS = -4.5 V, VDS = -15 V, ID = -2.2 A 2
Gate Resistance Rg 4.5 12.5 18.5 Ω f = 1 MHz 2
Turn-Off Delay Time td(off) 11 17 ns 2
Fall Time tf 8 12 ns 2
Rise Time tr 8 12 ns 2
Pulsed Current ISM -12 A 2
Forward Voltage VSD -0.85 -1.2 V IF = -1.2 A, VGS = 0 V 2

CAD (KiCad official)

  • Symbol: SQ1431EH-T1_GE3
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: sq1431eh-t1-ge3-etched.step / sq1431eh-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sq1431eh-t1-ge3.step / sq1431eh-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (10 pp, sha256 32e7b14c0a11eb36, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF