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RT9059GSP

Richtek Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP

RT9059GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGOOD output Power good open-drain output. Asserts (high-Z) when VOUT reaches 90% of its rated value (10% falling hysteresis) after a 1ms typical delay. Requires an external pull-up resistor; sink capability 0.2V @ 10mA.
2 EN input Enable control input. Logic-high (VIH >= 1.2V) enables the regulator; logic-low (VIL <= 0.4V) shuts it down and pulls VOUT low through ~150Ω. Absolute maximum -0.3V to 6V.
3 VIN power_in Supply input voltage; source of the regulated output current up to 3A. Operating range 1V to 5.5V. Bypass with a 10μF ceramic capacitor to GND close to the pin.
4 VDD power_in Supply voltage of the internal control circuit. Must satisfy VDD > VOUT + 1.5V; operating range 3V to 5.5V. Bypass with a 1μF ceramic capacitor to GND.
5 NC unconnected No internal connection. May be left floating or tied to GND for board layout convenience.
6 VOUT power_out Regulated output voltage, up to 3A load current. Dropout typically 350mV at 3A. Requires a 10μF ceramic output capacitor to GND.
7 ADJ input Output voltage feedback / setting input for the adjustable version. VOUT = VREF x (R1 + R2) / R2, with VREF = 0.8V typical. Connect the mid-point of the external R1/R2 divider from VOUT to GND.
8 GND power_in Ground return for the device. Pin 8 and the exposed pad (pin 9) are internally tied to GND.
9 GND (Exposed Pad) power_in Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum power dissipation (θJC = 6.5°C/W, PD = 3.08W @ 25°C).

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package SOP-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • RT9059GSP
  • RT9059-15GSP
  • RT9059-18GSP
  • RT9059-25GSP
  • RT9059GQW
  • RT9059-15GQW
  • RT9059-18GQW
  • RT9059-25GQW

CAD (KiCad official)

  • Symbol: RT9059GSP
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
rt9059gsp.step 125 KB You want the bare part, or you mark your own boards.
rt9059gsp-etched.step 2.3 MB You want the part with RT9059GSP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 557 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (12 pp, sha256 498869c640dbc9f4, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF