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SI4840BDY-T1-GE3
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Vishay Intertech MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSI4840BDY-T1-GE3
Vishay Intertech · MOSFETs · SO-8
SI4840BDY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET; the datasheet rates the continuous source-drain diode current at 5 A (TC = 25 °C). |
| 2 | S | passive | Source terminal of the N-channel MOSFET; the datasheet rates the continuous source-drain diode current at 5 A (TC = 25 °C). |
| 3 | S | passive | Source terminal of the N-channel MOSFET; the datasheet rates the continuous source-drain diode current at 5 A (TC = 25 °C). |
| 4 | G | input | Gate terminal of the N-channel MOSFET; the datasheet rates the gate-source voltage at ±20 V and the gate-source threshold voltage VGS(th) at 1 V to 3 V. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage VDS at 40 V. |
| 6 | D | passive | Drain terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage VDS at 40 V. |
| 7 | D | passive | Drain terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage VDS at 40 V. |
| 8 | D | passive | Drain terminal of the N-channel MOSFET; the datasheet rates the drain-source voltage VDS at 40 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | 40 | V | 1 | |||
| Gate-source voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous drain current | ID | 19 | A | TJ = 150 °C, TC = 25 °C | 1 | ||
| Continuous drain current | ID | 15 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Continuous drain current | ID | 12.4 | A | TJ = 150 °C, TA = 25 °C, notes a, b | 1 | ||
| Continuous drain current | ID | 9.9 | A | TJ = 150 °C, TA = 70 °C, notes a, b | 1 | ||
| Pulsed drain current | IDM | 50 | A | 1 | |||
| Avalanche current | IAS | 15 | A | L = 0.1 mH | 1 | ||
| Avalanche energy | EAS | 11 | mJ | 1 | |||
| Continuous source-drain diode current | IS | 5 | A | TC = 25 °C | 1 | ||
| Continuous source-drain diode current | IS | 2.1 | A | TA = 25 °C, notes a, b | 1 | ||
| Maximum power dissipation | PD | 6 | W | TC = 25 °C | 1 | ||
| Maximum power dissipation | PD | 3.8 | W | TC = 70 °C | 1 | ||
| Maximum power dissipation | PD | 2.5 | W | TA = 25 °C, notes a, b | 1 | ||
| Maximum power dissipation | PD | 1.6 | W | TA = 70 °C, notes a, b | 1 | ||
| Operating junction and storage temperature range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum junction-to-ambient | RthJA | 37 | 50 | °C/W | t ≤ 10 s, notes a, c | 1 | |
| Maximum junction-to-foot (drain) | RthJF | 17 | 21 | °C/W | Steady state | 1 | |
| Maximum junction-to-ambient, steady state (note c) | RthJA | 85 | °C/W | Steady state, note c | 1 | ||
| Drain-source breakdown voltage | VDS | 40 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Gate-source threshold voltage | VGS(th) | 1 | 3 | V | VDS = VGS, ID = 250 μA | 2 | |
| Gate-source leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 | |
| Zero gate voltage drain current | IDSS | 1 | μA | VDS = 40 V, VGS = 0 V | 2 | ||
| Zero gate voltage drain current | IDSS | 5 | μA | VDS = 40 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-state drain current | ID(on) | 50 | A | VDS ≥ 5 V, VGS = 10 V | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.0074 | 0.009 | Ω | VGS = 10 V, ID = 12.4 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.0095 | 0.012 | Ω | VGS = 4.5 V, ID = 10.8 A | 2 | |
| Total gate charge | Qg | 33 | 50 | nC | VDS = 20 V, VGS = 10 V, ID = 12.4 A | 2 | |
| Total gate charge | Qg | 15 | 23 | nC | VDS = 20 V, VGS = 4.5 V, ID = 12.4 A | 2 | |
| Gate resistance | Rg | 1.4 | 2.1 | Ω | f = 1 MHz | 2 | |
| Turn-on delay time | td(on) | 25 | 40 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 12 | 20 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 25 | 40 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 10 | 15 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 4.5 V, Rg = 1 Ω | 2 | |
| Turn-on delay time | td(on) | 10 | 15 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 15 | 25 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 30 | 45 | ns | VDD = 20 V, RL = 2 Ω, ID ≈ 10 A, VGEN = 10 V, Rg = 1 Ω | 2 | |
| Continuous source-drain diode current | IS | 30 | A | TC = 25 °C | 2 | ||
| Pulse diode forward current | ISM | 50 | A | 2 | |||
| Body diode voltage | VSD | 0.8 | 1.2 | V | IS = 10 A, VGS = 0 V | 2 | |
| Body diode reverse recovery time | trr | 30 | 60 | ns | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| Body diode reverse recovery charge | Qrr | 26 | 52 | nC | IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C | 2 |
CAD (KiCad official)
- Symbol:
SI4840BDY-T1-GE3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
si4840bdy-t1-ge3-etched.step/si4840bdy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si4840bdy-t1-ge3.step/si4840bdy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
f42d90f7b66cedb9, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).