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README

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LT3090EMSE#PBF

Analog Devices · Linear Voltage Regulators (LDO) · MSOP-12-EP

LT3090EMSE#PBF from Analog Devices, in a MSOP-12-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input pin that supplies power to the regulator; tie all IN pins together and to the exposed backside pad, and an input bypass capacitor of 2.2µF to 4.7µF generally suffices.
2 IN power_in Input pin that supplies power to the regulator; tie all IN pins together and to the exposed backside pad, and an input bypass capacitor of 2.2µF to 4.7µF generally suffices.
3 IN power_in Input pin that supplies power to the regulator; tie all IN pins together and to the exposed backside pad, and an input bypass capacitor of 2.2µF to 4.7µF generally suffices.
4 ILIM input Current limit programming pin; a resistor between ILIM and IN sets the limit (nominal scale factor 10A•kΩ), ILIM must not be driven more than 0.3V below IN, and it should be tied to IN if unused.
5 IMONP output Positive current monitor pin that sources current equal to 1/2000 of output current into a resistor to GND, must be at least 2V below IMONN, and must not be driven more than 0.3V below IN; tie to IN if unused.
6 IMONN output Negative current monitor pin that sinks current equal to 1/1000 of output current through a resistor to GND, must be at least 2V above IMONP for positive monitoring, and must not be driven more than 0.3V below IN; tie to GND if unused.
7 SHDN input Bidirectional shutdown pin referenced to GND that turns the output off within ±0.45V of GND and on beyond ±1.4V, must not be floated, and must not be driven more than 0.3V below IN.
8 SET input Inverting error amplifier input and regulation setpoint that receives a precision 50µA current; a resistor from SET to GND programs the output voltage, and SET must not be driven more than 0.3V below IN.
9 GND power_in Ground pin that supplies the quiescent current and NPN pass transistor drive current, and must not be driven more than 0.3V below IN.
10 OUT power_out Output pin that supplies power to the load; tie all OUT pins together, use a minimum 4.7µF output capacitor with ESR below 0.5Ω, and do not drive it more than 0.3V below IN.
11 OUT power_out Output pin that supplies power to the load; tie all OUT pins together, use a minimum 4.7µF output capacitor with ESR below 0.5Ω, and do not drive it more than 0.3V below IN.
12 OUT power_out Output pin that supplies power to the load; tie all OUT pins together, use a minimum 4.7µF output capacitor with ESR below 0.5Ω, and do not drive it more than 0.3V below IN.
13 IN power_in Exposed backside pad that is electrically connected to IN and the device substrate; it must be soldered to the PCB for proper electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-12-EP
Category Power Management ICs
Pins 13

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
SET Pin Current (25C row, as printed) ISET 49.5 50 50.5 µA VIN = -1.9V, ILOAD = 1mA, -36V < VIN < -1.9V, 1mA < ILOAD < 600mA (Note 5) 3
SET Pin Current (full temperature range, l) ISET 49 50 51 µA VIN = -1.9V, ILOAD = 1mA, -36V < VIN < -1.9V, 1mA < ILOAD < 600mA (Note 5) 3
Output Offset Voltage (25C row, as printed) VOS -1 1 mV VIN = -1.9V, ILOAD = 1mA, -36V < VIN < -1.9V, 1mA < ILOAD < 600mA (Note 5) 3
Output Offset Voltage (full temperature range, l) VOS -2 2 mV VIN = -1.9V, ILOAD = 1mA, -36V < VIN < -1.9V, 1mA < ILOAD < 600mA (Note 5) 3
Load Regulation: ΔVOS (full temperature range, l) ΔVOS 1.2 2.5 mV ILOAD = 1mA to 600mA, VIN = -1.9V (Note 6) 3
Output Regulation with SET Pin Voltage Change: ΔISET/ΔVSET (l) ΔISET/ΔVSET 0.2 2.5 nA/V VSET = 0V to -32V, VIN = -36V, ILOAD = 1mA 3
Output Regulation with SET Pin Voltage Change: ΔVOS/ΔVSET (l) ΔVOS/ΔVSET 1 30 µV/V VSET = 0V to -32V, VIN = -36V, ILOAD = 1mA 3
GND Pin Current at ILOAD = 10µA 1 1.4 mA VIN = VOUT(NOMINAL), ILOAD = 10µA (Note 8) 3
GND Pin Current at ILOAD = 1mA 1.05 1.4 mA VIN = VOUT(NOMINAL), ILOAD = 1mA (Note 8) 3
GND Pin Current at ILOAD = 100mA 2.6 5 mA VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 8) 3
GND Pin Current at ILOAD = 600mA 11.5 22.5 mA VIN = VOUT(NOMINAL), ILOAD = 600mA (Note 8) 3
Ripple Rejection (120Hz) 70 85 dB VIN, VOUT = -1.5V (Avg), VRIPPLE = 500mVP-P, fRIPPLE = 120Hz, ILOAD = 100mA, COUT = 4.7µF, CSET = 0.47µF 3
SHDN Pin Turn-ON Threshold, Positive SHDN Rising 1.14 1.23 1.32 V Positive SHDN Rising 3
SHDN Pin Turn-ON Threshold, Negative SHDN Rising (in Magnitude) -1.36 -1.27 -1.18 V Negative SHDN Rising (in Magnitude) 3
Quiescent Current in Shutdown (25C row) 0.1 1 µA VIN = -6V, VSHDN = 0V 3
Quiescent Current in Shutdown (full temperature range, l) 10 µA VIN = -6V, VSHDN = 0V 3
Internal Current Limit 650 750 850 mA VIN = -1.9V, VOUT = 0V 3
Internal Current Limit 20 35 60 mA VIN = -36V, VOUT = 0V 3
Internal Current Limit 630 730 830 mA VIN = -1.9V, ΔVOUT < 10mV 3
Max IOUT (programmable current limit) 460 500 540 mA VIN = -1.9V, RILIM = 20k 3
Max IOUT (programmable current limit) 85 100 115 mA VIN = -1.9V, RILIM = 100k 3
Positive Current Monitoring (IMONP) Scale Factor 280 300 320 mA/A IOUT = 600mA, VIN = -2.5V, VIMONN = 2V, VIMONP = 0V 4
Positive Current Monitoring (IMONP) at 100mA 42.5 50 57.5 µA IOUT = 100mA, VIN = -2.5V, VIMONN = 2V, VIMONP = 0V 4
Negative Current Monitoring (IMONN) Scale Factor 560 600 640 mA/A IOUT = 600mA, VIN = -2.5V, VIMONN = 0V, VIMONP = -2.5V 4
Negative Current Monitoring (IMONN) at 100mA 85 100 115 µA IOUT = 100mA, VIN = -2.5V, VIMONN = 0V, VIMONP = -2.5V 4
Minimum Required Load Current 10 µA -36V < VIN < -1.9V (l) 4
IN Pin Voltage with respect to GND VIN -40 0.3 V with respect to GND pin 2
ILIM Pin Voltage with respect to IN Pin -0.3 0.7 V with respect to IN pin (Note 3) 2
IMONP Pin Voltage with respect to IN Pin -0.3 40 V with respect to IN pin (Note 3) 2
IMONP Pin Voltage with respect to GND Pin -40 20 V with respect to GND pin 2
IMONP Pin Voltage with respect to IMONN Pin -40 20 V with respect to IMONN pin 2
IMONN Pin Voltage with respect to IN Pin -0.3 40 V with respect to IN pin (Note 3) 2
IMONN Pin Voltage with respect to GND Pin -40 20 V with respect to GND pin 2
SHDN Pin Voltage with respect to IN Pin -0.3 55 V with respect to IN pin (Note 3) 2
SHDN Pin Voltage with respect to GND Pin -40 20 V with respect to GND pin 2
SET Pin Voltage with respect to IN Pin -0.3 36 V with respect to IN pin (Note 3) 2
SET Pin Voltage with respect to GND Pin -36 36 V with respect to GND pin (±36V) 2
SET Pin Current -5 5 mA Note 9 2
OUT Pin Voltage with respect to IN Pin -0.3 36 V with respect to IN pin (Note 3) 2
OUT Pin Voltage with respect to GND Pin -36 36 V with respect to GND pin (±36V) 2
Operating Junction Temperature Range (E-grade) TJ -40 125 °C E-, I-Grade 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering, 10 Sec), MSE Package 300 °C 10 sec soldering, MSE package 2
Maximum Junction Temperature TJMAX 150 °C MSE package 2
Input Voltage Range (Wide Input Voltage Range) VIN -36 -1.5 V Features: wide input voltage range 1
Output Voltage Range (Rail-to-Rail) VOUT -32 0 V Features: rail-to-rail output voltage range 1
Minimum Output Capacitor COUT 4.7 µF Stable with minimum output capacitor 10
Output Capacitor ESR ESR 0.5 Ω ESR less than 0.5Ω to prevent oscillations (COUT minimum 4.7µF) 10
Thermal Resistance Junction-to-Ambient (MSOP, 2500mm² top/bottom copper) θJA 33 °C/W MSE package, device on topside, 2500mm² top side copper, 2500mm² bottom side, 2500mm² board 20
Thermal Resistance Junction-to-Ambient (MSOP, 1000mm² top copper) θJA 33 °C/W MSE package, device on topside, 1000mm² top side copper, 2500mm² bottom side, 2500mm² board 20
Thermal Resistance Junction-to-Ambient (MSOP, 225mm² top copper) θJA 34 °C/W MSE package, device on topside, 225mm² top side copper, 2500mm² bottom side, 2500mm² board 20
Thermal Resistance Junction-to-Ambient (MSOP, 100mm² top copper) θJA 35 °C/W MSE package, device on topside, 100mm² top side copper, 2500mm² bottom side, 2500mm² board 20
Thermal Resistance Junction-to-Case θJC 8 °C/W MSE package 2

CAD (KiCad official)

  • Symbol: LT3090EMSE#PBF
  • Footprint: Package_SO:MSOP-12-1EP_3x4.039mm_P0.65mm_EP1.651x2.845mm
  • 3D model: MSOP-12-EP (KiCad packages3D, STEP)
  • 3D model files: lt3090emse-pbf-etched.step / lt3090emse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3090emse-pbf.step / lt3090emse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (36 pp, sha256 a02e3baeccf7ef6c, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF