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Contents

README

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SN74F244DWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74F244DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ~{1OE} input Active-low output-enable for bank 1; LOW passes 1A inputs to 1Y outputs, HIGH forces 1Y1-1Y4 to high-impedance; IIL = −1 mA at VI = 0.5 V.
2 1A1 input Data input A1 for bank 1; drives 1Y1 when 1OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
3 2Y4 tri_state 3-state non-inverting output Y4 of bank 2; IOH = −15 mA, IOL = 64 mA; high-impedance when 2OE is HIGH.
4 1A2 input Data input A2 for bank 1; drives 1Y2 when 1OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
5 2Y3 tri_state 3-state non-inverting output Y3 of bank 2; IOH = −15 mA, IOL = 64 mA; high-impedance when 2OE is HIGH.
6 1A3 input Data input A3 for bank 1; drives 1Y3 when 1OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
7 2Y2 tri_state 3-state non-inverting output Y2 of bank 2; IOH = −15 mA, IOL = 64 mA; high-impedance when 2OE is HIGH.
8 1A4 input Data input A4 for bank 1; drives 1Y4 when 1OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
9 2Y1 tri_state 3-state non-inverting output Y1 of bank 2; IOH = −15 mA, IOL = 64 mA; high-impedance when 2OE is HIGH.
10 GND power_in Ground reference, 0 V.
11 2A1 input Data input A1 for bank 2; drives 2Y1 when 2OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
12 1Y4 tri_state 3-state non-inverting output Y4 of bank 1; IOH = −15 mA, IOL = 64 mA; high-impedance when 1OE is HIGH.
13 2A2 input Data input A2 for bank 2; drives 2Y2 when 2OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
14 1Y3 tri_state 3-state non-inverting output Y3 of bank 1; IOH = −15 mA, IOL = 64 mA; high-impedance when 1OE is HIGH.
15 2A3 input Data input A3 for bank 2; drives 2Y3 when 2OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
16 1Y2 tri_state 3-state non-inverting output Y2 of bank 1; IOH = −15 mA, IOL = 64 mA; high-impedance when 1OE is HIGH.
17 2A4 input Data input A4 for bank 2; drives 2Y4 when 2OE is LOW; VIH ≥ 2 V, VIL ≤ 0.8 V, IIL = −1.6 mA.
18 1Y1 tri_state 3-state non-inverting output Y1 of bank 1; IOH = −15 mA, IOL = 64 mA; high-impedance when 1OE is HIGH.
19 ~{2OE} input Active-low output-enable for bank 2; LOW passes 2A inputs to 2Y outputs, HIGH forces 2Y1-2Y4 to high-impedance; IIL = −1 mA at VI = 0.5 V.
20 VCC power_in Supply voltage; recommended operating range 4.5 V to 5.5 V (nominal 5 V), absolute maximum −0.5 V to 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74F244DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74f244dwr-etched.step / sn74f244dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74f244dwr.step / sn74f244dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 5f6a9410e790171e, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF