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Contents

README

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80P04

HL · MOSFETs · TO-252

80P04 from HL, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the P-channel MOSFET, with VGS rated ±20 V maximum and threshold of -1 to -2.5 V.
2 D passive Drain, connected to the exposed tab (center lead position); VDS rated -40 V and continuous current -80 A at TC = 25 °C.
3 S passive Source; continuous source current is -80 A at TC = 25 °C.

Key specifications

Parameter Value
Manufacturer HL
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -40 V 1
Gate-Source Voltage VGSS -20 20 V 1
Continuous Drain Current ID -80 A TC = 25°C 1
Continuous Drain Current ID -50.6 A TC = 100°C 1
Pulsed Drain Current IDM -320 A Note 1: repetitive rating, pulse width limited by TJ(MAX)=150°C 1
Single Pulsed Avalanche Energy EAS 101.25 mJ Note 2: VDD = -30V, VGS = -10V, L = 0.1mH, IAS = -45A 1
Power Dissipation PD 81.16 W TC = 25°C 1
Operating and Storage Temperature Range TJ, TSTG -55 175 °C 1
Drain-Source Breakdown Voltage V(BR)DSS -40 V VGS = 0V, ID = -250µA 2
Gate-body Leakage Current IGSS -100 100 nA VDS = 0V, VGS = ±20V 2
Zero Gate Voltage Drain Current IDSS -1 µA TJ = 25°C, VDS = -40V, VGS = 0V 2
Zero Gate Voltage Drain Current IDSS -100 µA TJ = 100°C, VDS = -40V, VGS = 0V 2
Gate-Threshold Voltage VGS(th) -1 -1.6 -2.5 V VDS = VGS, ID = -250µA 2
Drain-Source On-Resistance RDS(on) 6.4 8.2 mΩ VGS = -10V, ID = -20A 2
Drain-Source On-Resistance RDS(on) 8.2 11 mΩ VGS = -4.5V, ID = -15A 2
Diode Forward Voltage VSD -1.2 V IF = -20A, VGS = 0V 2
Continuous Source Current IS -80 A TC = 25°C 2
Thermal Resistance, Junction to Case RθJC 1.54 °C/W 1
Thermal Resistance, Junction to Ambient RθJA 54 °C/W Note 3: surface mounted on 1 inch² FR-4 board, 2OZ copper 1
Forward Transconductance gfs 104 S VDS = -10V, ID = -20A 2
Input Capacitance Ciss 5295 pF VDS = -20V, VGS = 0V, f = 1MHz 2
Output Capacitance Coss 430 pF VDS = -20V, VGS = 0V, f = 1MHz 2
Reverse Transfer Capacitance Crss 385 pF VDS = -20V, VGS = 0V, f = 1MHz 2
Gate Resistance Rg 4.3 Ω f = 1MHz 2
Total Gate Charge Qg 110 nC VGS = -10V, VDS = -20V, ID = -20A 2
Gate-Source Charge Qgs 12.5 nC VGS = -10V, VDS = -20V, ID = -20A 2
Gate-Drain Charge Qgd 23 nC VGS = -10V, VDS = -20V, ID = -20A 2
Turn-on Delay Time td(on) 16.8 ns VGS = -10V, VDD = -20V, RG = 3Ω, ID = -20A 2
Rise Time tr 10 ns VGS = -10V, VDD = -20V, RG = 3Ω, ID = -20A 2
Turn-off Delay Time td(off) 65 ns VGS = -10V, VDD = -20V, RG = 3Ω, ID = -20A 2
Fall Time tf 17 ns VGS = -10V, VDD = -20V, RG = 3Ω, ID = -20A 2
Body Diode Reverse Recovery Time trr 42 ns IF = -20A, dI/dt = 100A/µs 2
Body Diode Reverse Recovery Charge Qrr 29 nC IF = -20A, dI/dt = 100A/µs 2

CAD (KiCad official)

  • Symbol: 80P04
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: 80p04-etched.step / 80p04-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 80p04.step / 80p04.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HL datasheet (6 pp, sha256 af7e723ae9cd12d1, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF