component
GD32E103CBT6
Public Made by Adomby adom
GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownGD32E103CBT6
GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
GD32E103CBT6 from GigaDevice Semicon Beijing, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup power supply pin (default function VBAT); the pin-definition table gives no voltage limits for it. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13 with alternate function RTC_TAMPER; the I/O level is not marked 5VT in the table. |
| 3 | PC14-OSC32IN | bidirectional | General-purpose I/O PC14 with alternate function OSC32IN for the 32.768 kHz low-speed crystal (LXTAL); the I/O level is not marked 5VT. |
| 4 | PC15-OSC32OUT | bidirectional | General-purpose I/O PC15 with alternate function OSC32OUT for the 32.768 kHz low-speed crystal (LXTAL); the I/O level is not marked 5VT. |
| 5 | PD0-OSCIN | input | Default function OSCIN (high-speed crystal input, 4-32 MHz HXTAL); remappable to PD0, and PD0 cannot be used for EXTI in this package. |
| 6 | PD1-OSCOUT | output | Default function OSCOUT (high-speed crystal output); remappable to PD1, and PD1 cannot be used for EXTI in this package. |
| 7 | NRST | bidirectional | Reset pin (default function NRST). |
| 8 | VSSA | power_in | Analog ground pin for the ADC/DAC and analog circuitry (default function VSSA); VREF- is internally connected to VSSA in this package. |
| 9 | VDDA | power_in | Analog supply pin (default function VDDA); VREF+ is internally connected to VDDA in this package. |
| 10 | PA0-WKUP | bidirectional | General-purpose I/O PA0 with alternate functions WKUP, USART1_CTS, ADC01_IN0, TIMER1_CH0_ETI and TIMER4_CH0; the I/O level is not marked 5VT. |
| 11 | PA1 | bidirectional | General-purpose I/O PA1 with alternate functions USART1_RTS, ADC01_IN1, TIMER4_CH1 and TIMER1_CH1; the I/O level is not marked 5VT. |
| 12 | PA2 | bidirectional | General-purpose I/O PA2 with alternate functions USART1_TX, TIMER4_CH2, ADC01_IN2, TIMER8_CH0, TIMER1_CH2 and SPI0_IO2; the I/O level is not marked 5VT. |
| 13 | PA3 | bidirectional | General-purpose I/O PA3 with alternate functions USART1_RX, TIMER4_CH3, ADC01_IN3, TIMER1_CH3, TIMER8_CH1 and SPI0_IO3; the I/O level is not marked 5VT. |
| 14 | PA4 | bidirectional | General-purpose I/O PA4 with alternate functions SPI0_NSS, USART1_CK, DAC_OUT0 and ADC01_IN4, remappable to SPI2_NSS and I2S2_WS; the I/O level is not marked 5VT. |
| 15 | PA5 | bidirectional | General-purpose I/O PA5 with alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1; the I/O level is not marked 5VT. |
| 16 | PA6 | bidirectional | General-purpose I/O PA6 with alternate functions SPI0_MISO, ADC01_IN6 and TIMER2_CH0, TIMER12_CH0 (TIMER12_CH0 as printed), remappable to TIMER0_BKIN; the I/O level is not marked 5VT. |
| 17 | PA7 | bidirectional | General-purpose I/O PA7 with alternate functions SPI0_MOSI, ADC01_IN7, TIMER2_CH1 and TIMER13_CH0, remappable to TIMER0_CH0_ON; the I/O level is not marked 5VT. |
| 18 | PB0 | bidirectional | General-purpose I/O PB0 with alternate functions ADC01_IN8 and TIMER2_CH2, remappable to TIMER0_CH1_ON; the I/O level is not marked 5VT. |
| 19 | PB1 | bidirectional | General-purpose I/O PB1 with alternate functions ADC01_IN9 and TIMER2_CH3, remappable to TIMER0_CH2_ON; the I/O level is not marked 5VT. |
| 20 | PB2 | bidirectional | General-purpose 5V-tolerant I/O PB2 that also serves as BOOT1 (default function PB2, BOOT1). |
| 21 | PB10 | bidirectional | 5V-tolerant I/O PB10 with alternate functions I2C1_SCL and USART2_TX, remappable to TIMER1_CH2. |
| 22 | PB11 | bidirectional | 5V-tolerant I/O PB11 with alternate functions I2C1_SDA and USART2_RX, remappable to TIMER1_CH3. |
| 23 | VSS_1 | power_in | Digital ground pin (default function VSS_1). |
| 24 | VDD_1 | power_in | Digital supply pin (default function VDD_1). |
| 25 | PB12 | bidirectional | 5V-tolerant I/O PB12 with alternate functions SPI1_NSS, I2S1_WS, I2C1_SMBA, USART2_CK, TIMER0_BKIN and CAN1_RX. |
| 26 | PB13 | bidirectional | 5V-tolerant I/O PB13 with alternate functions SPI1_SCK, I2S1_CK, USART2_CTS, TIMER0_CH0_ON, CAN1_TX and I2C1_TXFRAME. |
| 27 | PB14 | bidirectional | 5V-tolerant I/O PB14 with alternate functions SPI1_MISO, USART2_RTS, TIMER0_CH1_ON and TIMER11_CH0. |
| 28 | PB15 | bidirectional | 5V-tolerant I/O PB15 with alternate functions SPI1_MOSI, I2S1_SD, TIMER0_CH2_ON and TIMER11_CH11 (as printed). |
| 29 | PA8 | bidirectional | 5V-tolerant I/O PA8 with alternate functions USART0_CK, TIMER0_CH0, CK_OUT0, VCORE, USBFS_SOF and CTC_SYNC. |
| 30 | PA9 | bidirectional | 5V-tolerant I/O PA9 with alternate functions USART0_TX, TIMER0_CH1 and USBFS_VBUS. |
| 31 | PA10 | bidirectional | 5V-tolerant I/O PA10 with alternate functions USART0_RX, TIMER0_CH2, USBFS_ID and V1REF. |
| 32 | PA11 | bidirectional | 5V-tolerant I/O PA11 with alternate functions USART0_CTS, CAN0_RX, USBFS_DM and TIMER0_CH3. |
| 33 | PA12 | bidirectional | 5V-tolerant I/O PA12 with alternate functions USART0_RTS, CAN0_TX, USBFS_DP and TIMER0_ETI. |
| 34 | PA13 | bidirectional | 5V-tolerant I/O PA13, default function JTMS/SWDIO, remappable to PA13. |
| 35 | VSS_2 | power_in | Digital ground pin (default function VSS_2). |
| 36 | VDD_2 | power_in | Digital supply pin (default function VDD_2). |
| 37 | PA14 | bidirectional | 5V-tolerant I/O PA14, default function JTCK/SWCLK, remappable to PA14. |
| 38 | PA15 | bidirectional | 5V-tolerant I/O PA15, default function JTDI, alternate SPI2_NSS and I2S2_WS, remappable to TIMER1_CH0_ETI, TIMER1_ETI, PA15 and SPI0_NSS. |
| 39 | PB3 | bidirectional | 5V-tolerant I/O PB3, default function JTDO, alternate SPI2_SCK and I2S2_CK, remappable to TIMER1_CH1, PB3, TRACESWO and SPI0_SCK. |
| 40 | PB4 | bidirectional | 5V-tolerant I/O PB4, default function NJTRST, alternate SPI2_MISO and I2C0_TXFRAME, remappable to TIMER2_CH0, PB4 and SPI0_MISO. |
| 41 | PB5 | bidirectional | I/O PB5 with alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD, remappable to TIMER2_CH1, SPI0_MOSI and CAN1_RX; the I/O level is not marked 5VT. |
| 42 | PB6 | bidirectional | 5V-tolerant I/O PB6 with alternate functions I2C0_SCL and TIMER3_CH0, remappable to USART0_TX, CAN1_TX and SPI0_IO2. |
| 43 | PB7 | bidirectional | 5V-tolerant I/O PB7 with alternate functions I2C0_SDA and TIMER3_CH1, remappable to USART0_RX and SPI0_IO3. |
| 44 | BOOT0 | input | Boot mode selection input (default function BOOT0). |
| 45 | PB8 | bidirectional | 5V-tolerant I/O PB8 with alternate functions TIMER3_CH2 and TIMER9_CH0, remappable to I2C0_SCL and CAN0_RX. |
| 46 | PB9 | bidirectional | 5V-tolerant I/O PB9 with alternate functions TIMER3_CH3 and TIMER10_CH0, remappable to I2C0_SDA and CAN0_TX. |
| 47 | VSS_3 | power_in | Digital ground pin (default function VSS_3). |
| 48 | VDD_3 | power_in | Digital supply pin (default function VDD_3). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage on 5V tolerant pin (maximum) | VIN | 6.5 | V | 5V tolerant pin; note (3): VIN maximum value cannot exceed 6.5 V | 43 | ||
| Input voltage on other I/O (maximum) | VIN | 3.6 | V | Input voltage on other I/O | 43 | ||
| Variation between different VDD power pins | /ΔVDDX/ | 50 | mV | Variations between different VDD power pins | 43 | ||
| Variation between different ground pins | /VSSX −VSS/ | 50 | mV | Variations between different ground pins | 43 | ||
| Maximum current for GPIO pins | IIO | -25 | 25 | mA | Maximum current for GPIO pins | 43 | |
| Operating temperature range | TA | -40 | 85 | °C | Operating temperature range | 43 | |
| Power dissipation of LQFP48 | PD | 574 | mW | Power dissipation at TA = 85°C of LQFP48 | 43 | ||
| Storage temperature range | TSTG | -55 | 150 | °C | Storage temperature range | 43 | |
| Maximum junction temperature | TJ | 125 | °C | Maximum junction temperature | 43 | ||
| Supply voltage | VDD | 1.71 | 3.3 | 3.6 | V | 43 | |
| Analog supply voltage (ADC not used) | VDDA | 1.71 | 3.3 | 3.6 | V | ADC not used | 43 |
| Analog supply voltage (ADC used) | VDDA | 2.4 | 3.3 | 3.6 | V | ADC used | 43 |
| Battery supply voltage | VBAT | 1.71 | 3.6 | V | 43 | ||
| AHB clock frequency | fHCLK | 120 | MHz | 44 | |||
| APB1 clock frequency | fAPB1 | 60 | MHz | 44 | |||
| APB2 clock frequency | fAPB2 | 120 | MHz | 44 | |||
| VDD rise time rate | tVDD | 0 | μs/V | Power up; printed maximum is ∞ (not numeric) | 44 | ||
| VDD fall time rate | tVDD | 20 | μs/V | Power down; printed maximum is ∞ (not numeric) | 44 | ||
| ESD HBM voltage | VESD(HBM) | 5000 | V | TA = 25 °C; JESD22-A114 | 53 | ||
| ESD CDM voltage | VESD(CDM) | 800 | V | TA = 25 °C; JESD22-C101 | 53 | ||
| Static latch-up I-test | LU | -200 | 200 | mA | TA = 25 °C; JESD78 | 54 | |
| Latch-up supply overvoltage | Vsupply | 5.4 | V | Vsupply over voltage | 54 | ||
| Crystal or ceramic frequency (HXTAL) | fHXTAL | 4 | 8 | 32 | MHz | 1.71 ≤ VDD ≤ 3.6 V | 54 |
| Crystal or ceramic duty cycle (HXTAL) | Ducy(HXTAL) | 30 | 50 | 70 | % | 54 | |
| External clock frequency (HXTAL bypass) | fHXTAL_ext | 1 | 50 | MHz | VDD = 3.3 V | 54 | |
| OSCIN high or low time (HXTAL bypass) | tH/L(HXTAL) | 5 | ns | 54 | |||
| OSCIN rise or fall time (HXTAL bypass) | tR/F(HXTAL) | 10 | ns | 54 | |||
| External user clock frequency (LXTAL bypass) | fLXTAL_ext | 32.768 | 1000 | kHz | VDD = 3.3 V | 55 | |
| OSC32IN rise or fall time (LXTAL bypass) | tR/F(LXTAL) | 50 | ns | 55 | |||
| IRC8M frequency accuracy, factory-trimmed | ACCIRC8M | -2.5 | 2.5 | % | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 56 | |
| IRC8M frequency accuracy, factory-trimmed | ACCIRC8M | -1.8 | 1.8 | % | VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C | 56 | |
| IRC8M frequency accuracy, factory-trimmed | ACCIRC8M | -1 | 1 | % | VDD = VDDA = 3.3 V, TA = 25 °C | 56 | |
| Low speed internal oscillator (IRC40K) frequency | fIRC40K | 28 | 40 | 60 | kHz | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 56 |
| IRC48M frequency accuracy, factory-trimmed | ACCIRC48M | -4 | 5 | % | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 57 | |
| IRC48M frequency accuracy, factory-trimmed | ACCIRC48M | -3 | 3 | % | VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C | 57 | |
| IRC48M frequency accuracy, factory-trimmed | ACCIRC48M | -2 | 2 | % | VDD = VDDA = 3.3 V, TA = 25 °C | 57 | |
| PLL input clock frequency | fPLLIN | 1 | 8 | 25 | MHz | 57 | |
| PLL output clock frequency | fPLLOUT | 16 | 120 | MHz | 57 | ||
| VCO output frequency | fVCO | 32 | 240 | MHz | 57 | ||
| PLL lock time | tLOCK | 300 | μs | 57 | |||
| Number of guaranteed program/erase cycles (endurance) | PECYC | 100 | kcycles | TA = -40 °C ~ +85 °C | 58 | ||
| Data retention time | tRET | 10 | years | 10k cycles at TA = 85 °C | 58 | ||
| Word programming time | tPROG | 37 | 44 | μs | TA = -40 °C ~ +85 °C | 58 | |
| Page erase time | tERASE | 3.2 | 4 | ms | TA = -40 °C ~ +85 °C | 58 | |
| Mass erase time | tMERASE | 8 | 10 | ms | TA = -40 °C ~ +85 °C | 58 | |
| NRST input low level voltage | VIL(NRST) | -0.5 | V | 1.8 V ≤ VDD = VDDA ≤ 3.6 V; printed maximum is 0.3 VDD (not numeric) | 58 | ||
| Low level output voltage (5V/standard I/O) | VOL | 0.11 | V | IIO = +8 mA, VDD = 3.3 V | 59 | ||
| Low level output voltage (5V/standard I/O) | VOL | 0.28 | V | IIO = +20 mA, VDD = 3.3 V | 59 | ||
| High level output voltage (5V/standard I/O) | VOH | 3.14 | V | IIO = +8 mA, VDD = 3.3 V | 59 | ||
| High level output voltage (5V/standard I/O) | VOH | 2.91 | V | IIO = +20 mA, VDD = 3.3 V | 59 | ||
| ADC clock frequency | fADC | 0.1 | 42 | MHz | 61 | ||
| Sampling time | ts | 0.036 | 5.7 | μs | fADC = 42 MHz | 61 | |
| ADC startup time | tSU | 1 | μs | 61 | |||
| DAC resistive load with buffer ON | RLOAD | 5 | kΩ | Resistive load with buffer ON | 63 | ||
| DAC load capacitance | CLOAD | 50 | pF | No pin/pad capacitance included | 63 | ||
| USBFS static output level high | VOH | 2.8 | 3.3 | 3.6 | V | RL of 15 kΩ to VSS | 66 |
| USBFS static output level low | VOL | 0.064 | 0.3 | V | RL of 1.0 kΩ to 3.6 V | 66 | |
| Junction-to-ambient thermal resistance (LQFP48) | ΘJA | 69.64 | °C/W | TA = 85°C, Natural convection, 2S2P PCB | 77 | ||
| Junction-to-board thermal resistance (LQFP48) | ΘJB | 43.16 | °C/W | TA = 25°C, Cold plate, 2S2P PCB | 77 | ||
| Junction-to-case thermal resistance (LQFP48) | ΘJC | 25.36 | °C/W | TA = 25°C, Cold plate, 2S2P PCB | 77 |
CAD (KiCad official)
- Symbol:
GD32E103CBT6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
gd32e103cbt6-etched.step/gd32e103cbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gd32e103cbt6.step/gd32e103cbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GigaDevice Semicon Beijing datasheet (80 pp, sha256
b9866c3233b5ee3b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).