component
FH1204S
Public Made by Adomby adom
鑫飞宏 , SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFH1204S
鑫飞宏 · IC · SOP-8
FH1204S from 鑫飞宏, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, tied to pins 2 and 3. |
| 2 | S | passive | Source of the N-channel MOSFET, tied to pins 1 and 3. |
| 3 | S | passive | Source of the N-channel MOSFET, tied to pins 1 and 2. |
| 4 | G | input | Gate of the N-channel MOSFET, with a gate-source voltage limit of ±20 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, tied to pins 6, 7 and 8, with a 40 V drain-source rating and 20 A drain current. |
| 6 | D | passive | Drain of the N-channel MOSFET, tied to pins 5, 7 and 8, with a 40 V drain-source rating and 20 A drain current. |
| 7 | D | passive | Drain of the N-channel MOSFET, tied to pins 5, 6 and 8, with a 40 V drain-source rating and 20 A drain current. |
| 8 | D | passive | Drain of the N-channel MOSFET, tied to pins 5, 6 and 7, with a 40 V drain-source rating and 20 A drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 鑫飞宏 |
| Package | SOP-8 |
| Category | |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(th) | 1.2 | 2.2 | V | VDS = VGS, IDS = 250 μA | 2 | |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VGS = ±20 V, VDS = 0 V | 2 | |
| Zero Gate Voltage Source Current | IDSS | 1 | μA | VDS = 40 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Source Current | IDSS | 30 | μA | TJ = 85 ℃ | 2 | ||
| Drain-Source On-State Resistance | RDS(ON) | 7 | 9 | mΩ | VGS = 10 V, ID = 10 A | 2 | |
| Drain-Source On-State Resistance | RDS(ON) | 9 | 13 | mΩ | VGS = 4.5 V, ID = 6 A | 2 | |
| Drain-Source Breakdown Voltage | BVDSS | 40 | V | VGS = 0 V, ID = 250 μA | 2 | ||
| Diode Forward Voltage | VSD | 1.3 | V | ISD = 10 A, VGS = 0 V | 2 | ||
| Drain-Source Voltage | VDS | 40 | V | TC = 25 ℃ | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | TC = 25 ℃ | 1 | |
| Drain Current | ID | 20 | A | TC = 25 ℃, VGS = 10 V | 1 | ||
| Pulsed Source Current | IDM | 80 | A | TC = 25 ℃, VGS = 10 V | 1 | ||
| Total Power Dissipation | Ptot | 2.8 | W | TC = 25 ℃ | 1 | ||
| Storage Temperature | Tstg | -55 | 150 | ℃ | 1 | ||
| Junction Temperature | TJ | 150 | ℃ | 1 | |||
| Diode Forward Current | IS | 20 | A | TC = 25 ℃ | 1 | ||
| Single Pulsed Avalanche Energy | EAS | 40 | mJ | VDD = 40 V, L = 0.5 mH | 1 | ||
| Thermal Resistance Junction to Ambient | RθJA | 64 | ℃/W | Surface mounted on 1 in2 pad area, t ≤ 10 sec | 1 | ||
| Thermal Resistance Junction to Case | RθJC | 8.5 | ℃/W | 1 |
CAD (KiCad official)
- Symbol:
FH1204S - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
fh1204s-etched.step/fh1204s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fh1204s.step/fh1204s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 鑫飞宏 datasheet (6 pp, sha256
436685fd90a129ba, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).