component
UCC28950PWR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC28950PWR
Texas Instruments · DC-DC Converters · TSSOP-24
UCC28950PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VREF | power_in | 5V reference voltage output with ±1.5% accuracy and 20mA maximum output current. |
| 2 | EA+ | input | Error amplifier noninverting input with common-mode input range from 0.5V to 3.6V. |
| 3 | EA- | input | Error amplifier inverting input with common-mode input range from 0.5V to 3.6V. |
| 4 | COMP | bidirectional | Error amplifier output and input to PWM comparator with output range 0.25V to 4.25V. |
| 5 | SS/EN | input | Soft-start programming and device enable input with shutdown threshold at 0.55V and pullup threshold at 3.7V typical. |
| 6 | DELAB | input | Dead-time programming input for delay between OUTA and OUTB gate drive outputs through external resistor to GND. |
| 7 | DELCD | input | Dead-time programming input for delay between OUTC and OUTD gate drive outputs through external resistor to GND. |
| 8 | DELEF | input | Delay-time programming input between primary side OUTA/OUTB and secondary side OUTE/OUTF through external resistor to GND. |
| 9 | TMIN | input | Minimum pulse width programming for burst mode operation through external resistor to GND, typical range 100ns to 800ns. |
| 10 | RT | input | Oscillator frequency setting and mode configuration; connect to VREF for leader mode or to GND for follower mode operation. |
| 11 | RSUM | input | Slope compensation programming for peak-current mode or voltage-mode control through external resistor to GND or VREF. |
| 12 | DCM | input | Discontinuous conduction mode threshold setting through resistor divider to enable synchronous rectifier disable at light load. |
| 13 | ADELEF | input | Adaptive delay-time programming between primary and secondary side switches through resistor divider to CS/GND. |
| 14 | ADEL | input | Adaptive dead-time programming for primary switches varying with load current through resistor divider to CS/GND. |
| 15 | CS | input | Current sense input for cycle-by-cycle overcurrent protection with 2.0V ±3% threshold and adaptive delay functions. |
| 16 | SYNC | bidirectional | Synchronization output from leader controller providing 0.5 duty-cycle pulses or input from leader for follower phase synchronization. |
| 17 | OUTF | output | Secondary synchronous rectifier gate drive output with 0.2A sink and source capability and amplitude equal to VDD. |
| 18 | OUTE | output | Secondary synchronous rectifier gate drive output with 0.2A sink and source capability and amplitude equal to VDD. |
| 19 | OUTD | output | Primary full-bridge gate drive output with 0.2A sink and source capability for complementary switch QD. |
| 20 | OUTC | output | Primary full-bridge gate drive output with 0.2A sink and source capability for complementary switch QC. |
| 21 | OUTB | output | Primary full-bridge gate drive output with 0.2A sink and source capability for low-side switch QB. |
| 22 | OUTA | output | Primary full-bridge gate drive output with 0.2A sink and source capability for high-side switch QA. |
| 23 | VDD | power_in | Bias supply input in range 8V to 17V requiring 1μF ceramic bypass capacitor with low ESR and ESL. |
| 24 | GND | power_in | Ground reference node for all signals and power return with recommended separate quiet analog plane connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-24 |
| Category | Power Management (PMIC) |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
UCC28950PWR - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
ucc28950pwr-etched.step/ucc28950pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc28950pwr.step/ucc28950pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (80 pp, sha256
a765d09f25ef27f8, retrieved 2026-09-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).