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Contents

README

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XC081S101

Si Change · Analog To Digital Converters (ADC) · SOT-23-6

XC081S101 from Si Change, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VA power_in Power supply input, operated from a single 4 V to 5.25 V supply and decoupled to GND with a 1 µF and 10 nF capacitor placed as close to the pins as possible.
2 GND power_in Ground for the power supply; all analog and digital signals are referred to this pin.
3 VIN power_in Analog input that can range from 0 V to VA, and VA should be kept greater than or equal to the maximum input signal to avoid code saturation.
4 SCLK input Digital clock input that directly controls the conversion and readout processes.
5 SDATA output Digital data output; output samples are clocked out on the falling edges of SCLK and the pin returns to tri-state once the data transfer is complete.
6 CS input Chip select; a conversion process begins on the falling edge of CS, and the device powers down if CS goes high before the 10th SCLK falling edge.

Key specifications

Parameter Value
Manufacturer Si Change
Package SOT-23-6
Category Data Acquisition
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Integral linearity -0.5 0.5 LSB 2
Differential linearity -0.5 0.5 LSB 2
Throughput rate fSAMPLE 500 800 KSPS fSCLK = 16 MHz, 4 V ≤ VDD ≤ 5.25 V 2
Supply current, normal operation (fSAMPLE = 800 KSPS, VDD = 4 V) IDD 0.74 0.88 mA Digital inputs = 0 V or VDD; fSAMPLE = 800 KSPS, fSCLK = 16 MHz, VDD = 4 V 2
Supply current, normal operation (fSAMPLE = 800 KSPS, VDD = 5 V) IDD 1.02 1.25 mA Digital inputs = 0 V or VDD; fSAMPLE = 800 KSPS, fSCLK = 16 MHz, VDD = 5 V 2
Supply current, normal operation (fSAMPLE = 500 KSPS, VDD = 4 V) IDD 0.45 0.45 mA Digital inputs = 0 V or VDD; fSAMPLE = 500 KSPS, fSCLK = 10 MHz, VDD = 4 V 2
Supply current, normal operation (fSAMPLE = 500 KSPS, VDD = 5 V) IDD 0.75 0.9 mA Digital inputs = 0 V or VDD; fSAMPLE = 500 KSPS, fSCLK = 10 MHz, VDD = 5 V 2
Resolution 8 Bits 2
No missing codes 8 Bits 2
Signal-to-noise ratio (SNR) SNR 49 dB fIN = 100 kHz 2
Total harmonic distortion (THD) THD -68 dB fIN = 100 kHz 2
Supply voltage (single supply, fully specified range) VDD 4 5.25 V Stated in description and spec header text, not a table row 1
Operating temperature range -40 85 °C Stated in description text, not a table row 1

CAD (KiCad official)

  • Symbol: XC081S101
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: xc081s101-etched.step / xc081s101-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc081s101.step / xc081s101.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Si Change datasheet (5 pp, sha256 a88714fc55c67cb3, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF