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OPA1692IDR

Public Made by Adom

by adom

Texas Instruments Audio Power OpAmps, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmpopa1692idr
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Contents

README

markdown

OPA1692IDR

Texas Instruments · Audio Power OpAmps · SOIC-8

OPA1692IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A. Rail-to-rail output stage, ±50 mA short-circuit current, drives capacitive loads up to 200 pF.
2 -IN A input Inverting input, channel A. High-impedance input (differential resistance 350 kΩ, common-mode resistance 350 MΩ, ~1.5 pF differential capacitance).
3 +IN A input Noninverting input, channel A. Common-mode range (V-)+1.5 V to (V+)-0.5 V; input bias current typ 300 nA.
4 V- power_in Negative (lowest) power supply. Total supply range 3.5 V to 36 V single-supply, or ±1.75 V to ±18 V split-supply. Common to both channels.
5 +IN B input Noninverting input, channel B. Common-mode range (V-)+1.5 V to (V+)-0.5 V; input bias current typ 300 nA.
6 -IN B input Inverting input, channel B. High-impedance input (differential resistance 350 kΩ, ~1.5 pF differential capacitance).
7 OUT B output Output of channel B. Rail-to-rail output stage, ±50 mA short-circuit current, drives capacitive loads up to 200 pF.
8 V+ power_in Positive (highest) power supply. Total supply range 3.5 V to 36 V single-supply, or ±1.75 V to ±18 V split-supply. Quiescent current 650 µA per channel (1.3 mA typ for the dual).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • OPA1692IDRD
  • OPA1692IDR
  • OPA1692IDRIDT
  • OPA1692IDRDGK
  • OPA1692IDRIDGKR
  • OPA1692IDRIDGKT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (single supply) VS 3.5 36 V Single supply 4
Supply voltage (split supply) VS 1.75 18 V Split supply, ±VS 4
Operating temperature TA -40 85 °C 4
Supply voltage VS 40 V VS = (V+) – (V–) 4
Input current -10 10 mA All pins except power-supply pins 4
Operating temperature TA -55 125 °C Operating, free-air 4
Junction temperature TJ 200 °C Junction 4
Storage temperature Tstg -65 150 °C Storage 4
Input offset voltage VOS -0.8 0.25 0.8 mV VS = ±1.75 V to ±18 V 5
Input offset voltage VOS -1 1 mV VS = ±1.75 V to ±18 V 5
Input offset voltage drift 0.5 5 µV/°C VS = ±1.75 V to ±18 V, TA = –40°C to +125°C 5
Power-supply rejection ratio PSRR 0.1 1.5 µV/V VS = ±1.75 V to ±18 V 5
Power-supply rejection ratio PSRR 2.25 µV/V TA = –40°C to +125°C 5
Input bias current IB 300 550 nA VCM = 0 V 5
Input bias current IB 600 nA TA = –40°C to +125°C 5
Input offset current IOS -15 2 15 nA VCM = 0 V 5
Input offset current IOS -20 20 nA TA = –40°C to +125°C 5
Common-mode rejection ratio CMRR 0.1 1 uV/V (V–) + 1.5 V ≤ VCM ≤ (V+) – 0.5 V 5
Common-mode rejection ratio CMRR 4 uV/V TA = –40°C to +125°C 5
Open-loop voltage gain AOL 110 140 dB TA = –40°C to +125°C 5
Open-loop voltage gain AOL 120 140 dB (V–) + 0.2 V ≤ VO ≤ (V+) – 0.2 V, RL = 2 kΩ 5
Voltage output VOUT -17.8 17.8 V RL = 2 kΩ 6
Short-circuit current ISC -50 50 mA One channel at a time 6
Capacitive load drive CLOAD 200 pF 6
Quiescent current (per channel) IQ 650 750 µA IOUT = 0 A 6
Quiescent current (per channel) IQ 650 975 µA IOUT = 0 A, TA = –40°C to +125°C 6
Junction-to-ambient thermal resistance (D, SOIC-8) RθJA 123.6 °C/W D (SOIC) 8 pins 4
Junction-to-case (top) thermal resistance (D, SOIC-8) RθJC(top) 63.4 °C/W D (SOIC) 8 pins 4
Junction-to-board thermal resistance (D, SOIC-8) RθJB 67 °C/W D (SOIC) 8 pins 4
Junction-to-top characterization parameter (D, SOIC-8) ψJT 16 °C/W D (SOIC) 8 pins 4
Junction-to-board characterization parameter (D, SOIC-8) ψJB 66.3 °C/W D (SOIC) 8 pins 4

CAD (KiCad official)

  • Symbol: OPA1692IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa1692idr-etched.step / opa1692idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa1692idr.step / opa1692idr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
opa1692idr.step 122 KB You want the bare part, or you mark your own boards.
opa1692idr-etched.step 2.1 MB You want the part with OPA1692IDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 516 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 1eb56b4ec00f5a72, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF