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GD32F105RBT6

Public Made by Adom

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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GD32F105RBT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F105RBT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Default function VBAT, listed as a power pin in the pin definition table.
2 PC13-TAMPER-RTC bidirectional Default function PC13; alternate function TAMPER-RTC.
3 PC14-OSC32_IN bidirectional Default function PC14; alternate function OSC32_IN (low-speed external oscillator input).
4 PC15-OSC32_OUT bidirectional Default function PC15; alternate function OSC32_OUT (low-speed external oscillator output).
5 OSC_IN input Default function OSC_IN (high-speed external oscillator input); can be remapped to PD0 on this package.
6 OSC_OUT output Default function OSC_OUT (high-speed external oscillator output); can be remapped to PD1 on this package.
7 NRST bidirectional Default function NRST; the pin definition table lists its type as I/O.
8 PC0 bidirectional Default function PC0; alternate function ADC_IN10.
9 PC1 bidirectional Default function PC1; alternate function ADC_IN11.
10 PC2 bidirectional Default function PC2; alternate function ADC_IN12.
11 PC3 bidirectional Default function PC3; alternate function ADC_IN13.
12 VSSA power_in Analog ground pin for the analog domain (default function VSSA).
13 VDDA power_in Analog supply pin; the block diagram shows the ADC and DAC powered by VDDA.
14 PA0-WKUP bidirectional Default function PA0; alternate functions WKUP, USART2_CTS, ADC_IN0, TM2_CH1_ETR, TM5_CH1 and TM8_ETR.
15 PA1 bidirectional Default function PA1; alternate functions USART2_RTS, ADC_IN1, TM2_CH2 and TM5_CH2.
16 PA2 bidirectional Default function PA2; alternate functions USART2_TX, ADC_IN2, TM2_CH3, TM5_CH3 and TM9_CH1 (remap).
17 PA3 bidirectional Default function PA3; alternate functions USART2_RX, ADC_IN3, TM2_CH4, TM5_CH4 and TM9_CH2 (remap).
18 VSS_4 power_in Ground pin VSS_4 for the digital domain.
19 VDD_4 power_in Digital supply pin VDD_4; the device operates from a 2.6 to 3.6 V supply per the general description.
20 PA4 bidirectional Default function PA4; alternate functions SPI1_NSS, USART2_CK, ADC12_IN4 and DAC_OUT1; remap SPI3_NSS and I2S3_WS.
21 PA5 bidirectional Default function PA5; alternate functions SPI1_SCK, ADC12_IN5 and DAC_OUT2.
22 PA6 bidirectional Default function PA6; alternate functions SPI1_MISO, ADC12_IN6, TM3_CH1, TM8_BKIN and TM13_CH1; remap TM1_BKIN.
23 PA7 bidirectional Default function PA7; alternate functions SPI1_MOSI, ADC12_IN7, TM3_CH2, TM8_CH1N and TM14_CH1; remap TM1_CH1N.
24 PC4 bidirectional Default function PC4; alternate function ADC12_IN14.
25 PC5 bidirectional Default function PC5; alternate function ADC12_IN15.
26 PB0 bidirectional Default function PB0; alternate functions ADC12_IN8, TM3_CH3 and TM8_CH2N; remap TM1_CH2N.
27 PB1 bidirectional Default function PB1; alternate functions ADC12_IN9, TM3_CH4 and TM8_CH3N; remap TM1_CH3N.
28 PB2 bidirectional Default function PB2/BOOT1; 5 V tolerant I/O per the pin definition table.
29 PB10 bidirectional Default function PB10 (5 V tolerant); alternate functions I2C2_SCL and USART3_TX; remap TM2_CH3.
30 PB11 bidirectional Default function PB11 (5 V tolerant); alternate functions I2C2_SDA and USART3_RX; remap TM2_CH4.
31 VSS_1 power_in Ground pin VSS_1 for the digital domain.
32 VDD_1 power_in Digital supply pin VDD_1; the device operates from a 2.6 to 3.6 V supply per the general description.
33 PB12 bidirectional Default function PB12 (5 V tolerant); alternate functions SPI2_NSS, I2C2_SMBAI, USART3_CK, TM1_BKIN, I2S2_WS and CAN2_RX.
34 PB13 bidirectional Default function PB13 (5 V tolerant); alternate functions SPI2_SCK, USART3_CTS, TM1_CH1N, I2S2_CK and CAN2_TX.
35 PB14 bidirectional Default function PB14 (5 V tolerant); alternate functions SPI2_MISO, USART3_RTS, TM1_CH2N and TM12_CH1.
36 PB15 bidirectional Default function PB15 (5 V tolerant); alternate functions SPI2_MOSI, TM1_CH3N, I2S2_SD and TM12_CH2.
37 PC6 bidirectional Default function PC6 (5 V tolerant); alternate functions I2S2_MCK and TM8_CH1; remap TM3_CH1.
38 PC7 bidirectional Default function PC7 (5 V tolerant); alternate functions I2S3_MCK and TM8_CH2; remap TM3_CH2.
39 PC8 bidirectional Default function PC8 (5 V tolerant); alternate function TM8_CH3; remap TM3_CH3.
40 PC9 bidirectional Default function PC9 (5 V tolerant); alternate function TM8_CH4; remap TM3_CH4.
41 PA8 bidirectional Default function PA8 (5 V tolerant); alternate functions USART1_CK, TM1_CH1 and MCO.
42 PA9 bidirectional Default function PA9 (5 V tolerant); alternate functions USART1_TX, TM1_CH2 and OTG_FS_VBUS.
43 PA10 bidirectional Default function PA10 (5 V tolerant); alternate functions USART1_RX, TM1_CH3 and OTG_FS_ID.
44 PA11 bidirectional Default function PA11 (5 V tolerant); alternate functions USART1_CTS, CANRX, OTG_FS_DM and TM1_CH4.
45 PA12 bidirectional Default function PA12 (5 V tolerant); alternate functions USART1_RTS, OTG_FS_DP, CAN1_TX and TM1_ETR.
46 PA13 bidirectional Default function JTMS/SWDIO (5 V tolerant); remap PA13.
47 VSS_2 power_in Ground pin VSS_2 for the digital domain.
48 VDD_2 power_in Digital supply pin VDD_2; the device operates from a 2.6 to 3.6 V supply per the general description.
49 PA14 bidirectional Default function JTCK/SWCLK (5 V tolerant); remap PA14.
50 PA15 bidirectional Default function JTDI (5 V tolerant); alternate functions SPI3_NSS and I2S3_WS; remap TM2_CH1_ETR, PA15 and SPI1_NSS.
51 PC10 bidirectional Default function PC10 (5 V tolerant); alternate function UART4_TX; remap USART3_TX, SPI3_SCK and I2S3_CK.
52 PC11 bidirectional Default function PC11 (5 V tolerant); alternate function UART4_RX; remap USART3_RX and SPI3_MISO.
53 PC12 bidirectional Default function PC12 (5 V tolerant); alternate function UART5_TX; remap USART3_CK, SPI3_MOSI and I2S3_SD.
54 PD2 bidirectional Default function PD2 (5 V tolerant); alternate functions TM3_ETR and UART5_RX.
55 PB3 bidirectional Default function JTDO (5 V tolerant); alternate functions SPI3_SCK and I2S3_CK; remap PB3, TRACESWO, TM2_CH2 and SPI1_SCK.
56 PB4 bidirectional Default function NJTRST (5 V tolerant); alternate function SPI3_MISO; remap TM3_CH1, PB4 and SPI1_MISO.
57 PB5 bidirectional Default function PB5; alternate functions I2C1_SMBAI, SPI3_MOSI and I2S3_SD; remap TM3_CH2, SPI1_MOSI and CAN2_RX.
58 PB6 bidirectional Default function PB6 (5 V tolerant); alternate functions I2C1_SCL and TM4_CH1; remap USART1_TX and CAN2_TX.
59 PB7 bidirectional Default function PB7 (5 V tolerant); alternate functions I2C1_SDA, TM4_CH2 and EXMC_NADV; remap USART1_RX.
60 BOOT0 input Boot pin BOOT0 (default function), which selects the boot mode together with the BOOT1 option.
61 PB8 bidirectional Default function PB8 (5 V tolerant); alternate functions TM4_CH3 and TM10_CH1; remap I2C1_SCL and CAN1_RX.
62 PB9 bidirectional Default function PB9 (5 V tolerant); alternate functions TM4_CH4 and TM11_CH1; remap I2C1_SDA and CAN1_TX.
63 VSS_3 power_in Ground pin VSS_3 for the digital domain.
64 VDD_3 power_in Digital supply pin VDD_3; the device operates from a 2.6 to 3.6 V supply per the general description.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage on other I/O VIN 4 V 32
Maximum current for GPIO pins IIO 25 mA 32
Operating temperature range TA -40 85 °C 32
Storage temperature range TSTG -55 150 °C 32
Maximum junction temperature TJ 125 °C 32
Supply voltage VDD 2.6 3.3 3.6 V 32
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 32
Battery supply voltage VBAT 1.8 3.6 V 32
Supply current (Deep-Sleep mode) IDD 0.65 1.4 mA VDD=VBAT=3.3V, All clock off, LSI on, RTC on, All GPIOs analog mode 33
Power on reset threshold VPOR 2.32 2.4 2.48 V 34
Power down reset threshold VPDR 2.27 2.35 2.43 V 34
High Speed External oscillator (HSE) frequency fHSE 3 8 32 MHz VDD=3.3V 35
Recommended load capacitance on OSC_IN and OSC_OUT CHSE 20 30 pF 35
HSE oscillator duty cycle DHSE 48 50 52 % 35
Low Speed External oscillator (LSE) frequency fLSE 32.768 1000 KHz VDD=VBAT=3.3V 36
Recommended load capacitance on OSC32_IN and OSC32_OUT CLSE 15 pF 36
LSE oscillator duty cycle DLSE 48 50 52 % 36
HSI oscillator Frequency accuracy, Factory-trimmed ACCHSI -2.5 1.5 % VDD=3.3V, TA=-40°C ~+105°C 36
HSI oscillator Frequency accuracy, Factory-trimmed ACCHSI -1.2 1.2 % VDD=3.3V, TA=0°C ~ +85°C 36
HSI oscillator Frequency accuracy, Factory-trimmed ACCHSI -1 1 % VDD=3.3V, TA=25°C 36
HSI oscillator duty cycle DHSI 48 50 52 % VDD=3.3V, fHSI=8MHz 36
HSI oscillator operating current IDDHSI 80 100 μA VDD=3.3V, fHSI=8MHz 36
HSI oscillator startup time tSUHSI 1 2 us VDD=3.3V, fHSI=8MHz 36
Low Speed Internal oscillator (LSI) frequency fLSI 30 40 60 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 36
LSI oscillator operating current IDDLSI 1 2 μA VDD=VBAT=3.3V, TA=25°C 36
LSI oscillator startup time tSULSI 80 μs VDD=VBAT=3.3V, TA=25°C 36
PLL input clock frequency fPLLIN 1 8 25 MHz 37
PLL output clock frequency fPLL 16 108 MHz 37
Number of guaranteed program/erase cycles before failure (Endurance) PECYC 100 kcycles TA=-40°C ~ +85°C 37
Data retention time tRET 20 years TA=125°C 37
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 37
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 37
Mass erase time tMERASE 3.2 9.6 s TA=-40°C ~ +85°C 37
Standard IO Low level input voltage VIL -0.3 0.95 V VDD=2.6V 37
5V-tolerant IO Low level input voltage VIL -0.3 0.9 V VDD=2.6V 37
Standard IO High level input voltage VIH 1.2 4 V VDD=2.6V 37
5V-tolerant IO High level input voltage VIH 1.5 5.5 V VDD=2.6V 37
Low level output voltage VOL 0.2 V VDD=2.6V 37
High level output voltage VOH 2.3 V VDD=2.6V 37
Internal pull-up resistor RPU 30 40 50 kΩ VIN=VSS 37
Internal pull-down resistor RPD 30 40 50 kΩ VIN=VDD 37
ADC clock fADC 0.6 14 MHz 38
ADC conversion time fADCCONV 1 18 μs fADC=14MHz 38
Input sampling switch resistance RADC 0.5 kΩ 38
Startup time tSU 1 μs 38
Load resistance RLOAD 5 kΩ Resistive load vs. VSSA with buffer ON 38
Load capacitance CLOAD 50 pF No pin/pad capacitance included 38
Differential non-linearity error DNE -3 3 LSB DAC in 12-bit 38
Integral non-linearity INL -4 4 LSB DAC in 12-bit 38
Offset error Offset -12 12 LSB DAC in 12-bit, VREF+ = 3.6 V 38
Gain error GE -0.5 0.5 % DAC in 12-bit 38
SCL clock frequency fSCL 0 100 KHz Standard mode 38
SCL clock frequency fSCL 0 400 KHz Fast mode 38
SCL clock high time tSCL(H) 4 ns Standard mode 38
SCL clock high time tSCL(H) 0.6 ns Fast mode 38
SCL clock low time tSCL(L) 4.7 ns Standard mode 38
SCL clock low time tSCL(L) 1.3 ns Fast mode 38
SCK clock frequency fSCK 18 MHz 39
SCK clock high time tSCK(H) 19 ns 39
SCK clock low time tSCK(L) 19 ns 39

CAD (KiCad official)

  • Symbol: GD32F105RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f105rbt6-etched.step / gd32f105rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f105rbt6.step / gd32f105rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (43 pp, sha256 8c1cff9a4e1adebc, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF