component
PIC16F18313-I
Public Made by Adomby adom
Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPIC16F18313-I
Microchip Tech · MICROCHIP · SOIC-8
PIC16F18313-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply pin; the PIC16F18313 operating voltage range is 2.3V to 5.5V. |
| 2 | RA5 | bidirectional | General purpose I/O pin RA5, also usable as ADC channel ANA5, TMR1 clock input, external clock input CLKIN or oscillator pin OSC1. |
| 3 | RA4 | bidirectional | General purpose I/O pin RA4, also usable as ADC channel ANA4, comparator C1IN1- input, TMR1 gate input, or CLKOUT (FOSC/4) output. |
| 4 | RA3 | input | Input-only pin RA3 that is also the MCLR (master clear, internal pull-up when enabled) and VPP programming voltage pin. |
| 5 | RA2 | bidirectional | General purpose I/O pin RA2, also usable as ADC channel ANA2, VREF- input, TMR0 clock input, external interrupt INT or CWG1 input. |
| 6 | RA1 | bidirectional | General purpose I/O pin RA1, also usable as ADC channel ANA1, VREF+ input, comparator C1IN0- input, or the ICSP programming clock ICSPCLK / ICD clock ICDCLK. |
| 7 | RA0 | bidirectional | General purpose I/O pin RA0, also usable as ADC channel ANA0, comparator C1IN0+ input, DAC1OUT output, or the ICSP data pin ICSPDAT / ICD data ICDDAT. |
| 8 | VSS | power_in | Ground reference pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage VDD (FOSC <= 16 MHz) | VDD | 2.3 | 5.5 | V | PIC16F18313/18323, FOSC <= 16 MHz | 393 | |
| Operating Voltage VDD (FOSC > 16 MHz) | VDD | 2.5 | 5.5 | V | PIC16F18313/18323, FOSC > 16 MHz | 393 | |
| Operating Ambient Temperature (Industrial) | TA | -40 | 85 | °C | Industrial temperature range (-I) | 391 | |
| Voltage on VDD pin with respect to VSS | VDD | -0.3 | 6.5 | V | PIC16F18313/18323 | 390 | |
| Voltage on MCLR pin with respect to VSS | VMCLR | -0.3 | 9 | V | 390 | ||
| Ambient temperature under bias | TA | -40 | 125 | °C | 390 | ||
| Storage temperature | -65 | 150 | °C | 390 | |||
| Maximum current on VSS pin | 250 | mA | -40°C <= TA <= +85°C | 390 | |||
| Maximum current on VDD pin | 250 | mA | -40°C <= TA <= +85°C | 390 | |||
| Maximum current on any I/O pin | 50 | mA | 390 | ||||
| Clamp current IK | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 390 | ||
| Total power dissipation | 800 | mW | 390 | ||||
| Maximum junction temperature | TJMAX | 150 | °C | 399 | |||
| Supply Voltage in Sleep (RAM retention) | VDR | 1.7 | V | Device in Sleep mode | 393 | ||
| Power-on Reset Release Voltage | VPOR | 1.6 | V | BOR and LPBOR disabled | 393 | ||
| Power-on Reset ReARM Voltage | VPORR | 1.5 | V | BOR and LPBOR disabled | 393 | ||
| VDD Rise Rate to ensure Internal POR Signal | SVDD | 0.05 | V/ms | BOR and LPBOR disabled | 393 | ||
| Supply Current XT = 4 MHz | IDDXT4 | 302 | 410 | uA | XT = 4 MHz, 3.0V | 395 | |
| Supply Current HFINTOSC = 16 MHz | IDDHFO16 | 1.3 | 1.6 | mA | HFINTOSC = 16 MHz, 3.0V | 395 | |
| Supply Current Idle Mode HFINTOSC = 16 MHz | IDDIDLE | 743 | 1100 | uA | Idle Mode, HFINTOSC = 16 MHz, 3.0V | 395 | |
| Power-down current IPD base | IPD | 0.3 | 2.4 | uA | 3.0V, VREGPM = 1, Max +85°C | 396 | |
| Power-down current Low-Frequency INTOSC/WDT | IPD_WDT | 0.5 | 3.3 | uA | 3.0V, Max +85°C | 396 | |
| Power-down current Secondary Oscillator | IPD_SOSC | 1.5 | 3.2 | uA | 3.0V, Max +85°C | 396 | |
| Power-down current FVR | IPD_FVR | 40 | 70 | uA | 3.0V, Max +85°C | 396 | |
| Power-down current Brown-out Reset | IPD_BOR | 10.5 | 16.4 | uA | 3.0V, Max +85°C | 396 | |
| Power-down current ADC non-converting | IPD_ADCA | 0.3 | 2.4 | uA | 3.0V, ADC not converting, Max +85°C | 396 | |
| Power-down current Comparator | IPD_CMP | 30 | 44 | uA | 3.0V, Max +85°C | 396 | |
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | 4.5V <= VDD <= 5.5V | 397 | ||
| Input Low Voltage, Schmitt Trigger buffer | VIL | 0.2 | x VDD | 2.0V <= VDD <= 5.5V | 397 | ||
| Input Low Voltage, MCLR | VIL | 0.2 | x VDD | 397 | |||
| Input High Voltage, TTL buffer | VIH | 2 | V | 4.5V <= VDD <= 5.5V | 397 | ||
| Input High Voltage, Schmitt Trigger buffer | VIH | 0.8 | x VDD | 2.0V <= VDD <= 5.5V | 397 | ||
| Input High Voltage, SMBus levels | VIH | 2.1 | V | 2.7V <= VDD <= 5.5V | 397 | ||
| Input High Voltage, MCLR | VIH | 0.7 | x VDD | 397 | |||
| Input Leakage Current I/O Ports | IIL | -125 | 125 | nA | VSS <= VPIN <= VDD, pin at high-impedance, 85°C | 397 | |
| Input Leakage Current MCLR | IIL | -200 | 200 | nA | VSS <= VPIN <= VDD, pin at high-impedance, 85°C | 397 | |
| Weak Pull-up Current | IPUR | 25 | 120 | 200 | uA | VDD = 3.0V, VPIN = VSS | 397 |
| Output Low Voltage I/O ports | VOL | 0.6 | V | IOL = 10.0 mA, VDD = 3.0V | 397 | ||
| Pin capacitance All I/O pins | CIO | 5 | 50 | pF | 397 | ||
| Data EEPROM Byte Endurance | ED | 100 | k E/W | -40°C <= TA <= 85°C | 398 | ||
| Byte Erase and Write Cycle Time | TD_BEW | 4 | 5 | ms | 398 | ||
| Self-Timed Row Erase or Self-Timed Write | TP_REW | 2 | 2.5 | ms | 398 | ||
| Low-Frequency Internal Oscillator Frequency | FLFOSC | 31 | kHz | 402 | |||
| Clock Duty Cycle | TECL_DC | 40 | 60 | % | External clock modes | 401 | |
| System Clock Frequency | FOSC | 32 | MHz | 401 | |||
| Instruction Period | TCY | 125 | ns | 401 | |||
| MCLR Pulse Width Low to ensure Reset | TMCLR | 2 | us | 406 | |||
| Watchdog Timer Time-out Period | TWDT | 10 | 16 | 27 | ms | 16 ms Nominal Reset Time | 406 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | 406 | |
| Brown-out Reset Voltage BORV = 0 | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 406 |
| Brown-out Reset Voltage BORV = 1 | VBOR | 2.3 | 2.45 | 2.6 | V | BORV = 1 (PIC16F18313/18323) | 406 |
| Brown-out Reset Hysteresis | VBORHYS | 0 | 25 | 75 | mV | 406 | |
| Brown-out Reset Response Time | TBORDC | 1 | 3 | 35 | us | 406 | |
| 1x Gain FVR (1.024V nominal) accuracy | VFVR1 | -4 | 4 | % | VDD >= 2.5V, -40°C to 85°C | 410 | |
| 2x Gain FVR (2.048V nominal) accuracy | VFVR2 | -4 | 4 | % | VDD >= 2.5V, -40°C to 85°C | 410 | |
| 4x Gain FVR (4.096V nominal) accuracy | VFVR4 | -5 | 5 | % | VDD >= 4.75V, -40°C to 85°C | 410 | |
| FVR Start-up Time | TFVRST | 35 | us | 410 | |||
| Comparator Input Offset Voltage | VIOFF | -50 | 50 | mV | VICM = VDD/2 | 410 | |
| Comparator Hysteresis | CHYST | 15 | 25 | 35 | mV | 410 | |
| Comparator Response Time, Rising Edge | TRESP | 300 | 600 | ns | Response time measured with one input at VDD/2 | 410 | |
| ADC Integral Error | EIL | -1 | 1 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 407 | |
| ADC Recommended Impedance of Analog Voltage Source | ZAIN | 10 | k | 407 | |||
| DAC Absolute Accuracy | VACC | -0.5 | 0.5 | LSb | 410 | ||
| DAC Settling Time | TST | 10 | us | DACR[4:0] transitions from 00000 to 01111 | 410 | ||
| Junction-to-Ambient Thermal Resistance 8-pin SOIC | JA | 112.4 | C/W | 8-pin SOIC package | 399 | ||
| Junction-to-Case Thermal Resistance 8-pin SOIC | JC | 50 | C/W | 8-pin SOIC package | 399 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | BODY RxyPPS | 259 |
CAD (KiCad official)
- Symbol:
PIC16F18313-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pic16f18313-i-etched.step/pic16f18313-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f18313-i.step/pic16f18313-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (471 pp, sha256
5b9713da292b02eb, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).