OCuLink Riser for the Supermicro AIOM Slot

{
 "video": "/john/oculink-aiom-riser/render/video/oculink-riser.mp4",
 "title": "An OCuLink riser for the Supermicro AIOM slot, built by AI",
 "poster": "/john/oculink-aiom-riser/render/video/oculink-riser-poster.jpg",
 "chapters": [
  {
   "t": 0.0,
   "title": "The request"
  },
  {
   "t": 8.27,
   "title": "What this board does"
  },
  {
   "t": 83.77,
   "title": "Spec research and impedance"
  },
  {
   "t": 100.4,
   "title": "Routing the high-speed lanes"
  },
  {
   "t": 125.7,
   "title": "The board in KiCad"
  },
  {
   "t": 142.17,
   "title": "Current and thermal checks"
  },
  {
   "t": 153.07,
   "title": "Silkscreen and 3D"
  },
  {
   "t": 159.4,
   "title": "Export and the finish line"
  }
 ],
 "captions": "WEBVTT\n\n00:00:00.000 --> 00:00:05.709\nA YouTube viewer asked for an OCuLink\nriser for the AIOM slot on their\nSupermicro server.\n\n00:00:05.829 --> 00:00:08.015\nBefore we build it, here is what that\nmeans.\n\n00:00:08.267 --> 00:00:12.287\nThis is the kind of server the viewer has:\na Supermicro rack server.\n\n00:00:12.407 --> 00:00:15.696\nInside, besides the normal PCIe slots,\n\n00:00:15.696 --> 00:00:20.110\nnewer Supermicro boards have one or two\nAIOM slots.\n\n00:00:20.367 --> 00:00:27.982\nFrom the back, Supermicro labels them:\nPCIe x16, AIOM, OCP 3.0.\n\n00:00:28.102 --> 00:00:32.050\nA full sixteen lane slot, the same\nbandwidth as a graphics card slot.\n\n00:00:32.300 --> 00:00:36.651\nBut only one kind of card fits: an AIOM\nnetwork card like this one.\n\n00:00:36.771 --> 00:00:40.469\nIf you don't need another network card,\nthose sixteen lanes sit unused.\n\n00:00:40.733 --> 00:00:41.733\nThis board changes that.\n\n00:00:41.853 --> 00:00:46.187\nIt plugs into the AIOM slot in place of\nthe network card,\n\n00:00:46.187 --> 00:00:52.193\nand splits the sixteen lanes into four\nOCuLink ports, each a full PCIe x4 link.\n\n00:00:52.433 --> 00:00:56.424\nRun an OCuLink cable from each port to a\nU.2 NVMe drive,\n\n00:00:56.424 --> 00:01:02.054\nand the server gains four more fast\ndrives, each running at full Gen 4x4\nspeed,\n\n00:01:02.054 --> 00:01:04.406\nabout eight gigabytes per second.\n\n00:01:04.667 --> 00:01:07.881\nOr cable a port to an OCuLink dock like\nthis one,\n\n00:01:07.881 --> 00:01:13.063\nand hang a graphics card or another PCIe\ncard off the server, outside the case.\n\n00:01:13.300 --> 00:01:17.992\nThere is one catch: the server's BIOS has\nto support splitting that slot four ways.\n\n00:01:18.112 --> 00:01:23.530\nWhen it does, an unused network slot\nbecomes four general purpose PCIe ports.\n\n00:01:23.767 --> 00:01:24.318\nNow the build.\n\n00:01:24.438 --> 00:01:27.747\nWe typed that one request into Claude, in\nAdom Hydrogen.\n\n00:01:27.867 --> 00:01:33.558\nIt reads the OCP 3.0 spec and the OCuLink\nstandards, pinout tables and all.\n\n00:01:33.800 --> 00:01:40.135\nIt writes a small field solver and finds\ntrace widths for 85 ohm differential pairs\non a six layer stack-up.\n\n00:01:40.400 --> 00:01:45.475\nThirty six high speed pairs are routed\nfrom the gold fingers to four OCuLink\nconnectors,\n\n00:01:45.475 --> 00:01:46.513\nwith no crossings.\n\n00:01:46.767 --> 00:01:51.764\nEvery lane in a port is tuned to arrive\nwithin a hundredth of a picosecond of its\nneighbors.\n\n00:01:51.1000 --> 00:01:54.350\nThe design record: impedance per layer,\n\n00:01:54.350 --> 00:01:57.964\nskew inside every pair under two\nhundredths of a millimeter.\n\n00:01:58.200 --> 00:02:03.295\nOn the adom-aiflow timeline, the run moves\nthrough design rules:\n\n00:02:03.295 --> 00:02:05.444\nJLCPCB's six layer process.\n\n00:02:05.700 --> 00:02:09.690\nThen the real board opens in KiCad: gold\nfingers at the bottom,\n\n00:02:09.690 --> 00:02:11.084\nconnectors at the top.\n\n00:02:11.333 --> 00:02:16.207\nForty seven parts land live, one at a\ntime, each its own undo step.\n\n00:02:16.467 --> 00:02:19.469\nThen one hundred sixty nine traces land\nthe same way,\n\n00:02:19.469 --> 00:02:21.904\nevery one checked against the design\nrules.\n\n00:02:22.167 --> 00:02:24.366\nThe current check needs a real field\nsolve.\n\n00:02:24.486 --> 00:02:26.036\nClaude finds why it fails:\n\n00:02:26.036 --> 00:02:29.495\na tenth of a millimeter via ring the\nsolver could not see.\n\n00:02:29.733 --> 00:02:32.813\nWith a finer grid, current and thermal\nboth pass.\n\n00:02:33.067 --> 00:02:36.992\nClean silkscreen, and the finished board\nin KiCad's 3D viewer:\n\n00:02:36.992 --> 00:02:39.145\nevery test point and port labeled.\n\n00:02:39.400 --> 00:02:42.229\nGerbers for all six copper layers, drill\nfiles,\n\n00:02:42.229 --> 00:02:44.697\npick and place and the bill of materials,\n\n00:02:44.697 --> 00:02:47.405\neach read back and checked against the\nboard.\n\n00:02:47.667 --> 00:02:51.766\nFinish passes: zero design rule errors,\nzero unconnected.\n\n00:02:51.886 --> 00:02:56.297\nA manufacturable PCI Express Gen4 card,\nfrom a one line comment,\n\n00:02:56.297 --> 00:02:59.606\ndesigned and checked by Claude in Adom\nHydrogen.\n"
}