board
OCuLink Riser for the Supermicro AIOM Slot
Public Unreviewedby John Lauer
Passive OCP NIC 3.0 SFF card that breaks a Supermicro AIOM slot's PCIe x16 into four OCuLink 4i ports (4 x4, Gen4): 6-layer, 85 ohm, length-matched, DRC-clean KiCad project with Gerbers, BOM and CPL.
← Commit history
Videos: sentence-exact captions (VTT+SRT), no dead air; new 3D tour of the card and its component pages
12 files changed
+718−117
video/oculink-riser-poster.jpgvideo/oculink-riser-tour-poster.jpgvideo/oculink-riser-tour.chapters.json+30video/oculink-riser-tour.mp4video/oculink-riser-tour.srt+178video/oculink-riser-tour.video.json+36video/oculink-riser-tour.vtt+142video/oculink-riser.chapters.json+7−7video/oculink-riser.mp4video/oculink-riser.srt+228video/oculink-riser.video.json+9−8video/oculink-riser.vtt+88−102video/oculink-riser-poster.jpg⋯ 1 unchanged line ⋯
video/oculink-riser-tour-poster.jpgadded⋯ 1 unchanged line ⋯
video/oculink-riser-tour.chapters.jsonadded+30@@ -0,0 +1,30 @@+[+ {+ "t": 0.0,+ "title": "The finished card"+ },+ {+ "t": 11.2,+ "title": "Four OCuLink ports"+ },+ {+ "t": 30.23,+ "title": "Control logic"+ },+ {+ "t": 54.93,+ "title": "Gold fingers"+ },+ {+ "t": 61.73,+ "title": "Underside"+ },+ {+ "t": 74.73,+ "title": "New page: OCuLink receptacle"+ },+ {+ "t": 111.53,+ "title": "New page: FRU EEPROM"+ }+]
video/oculink-riser-tour.mp4added⋯ 1 unchanged line ⋯
video/oculink-riser-tour.srtadded+178@@ -0,0 +1,178 @@+1+00:00:00,000 --> 00:00:03,354+Here is the finished card in Adom's 3D+viewer:++2+00:00:03,354 --> 00:00:07,656+seventy six by one hundred fifteen+millimeters, six layers,++3+00:00:07,656 --> 00:00:10,937+cut to the OCP 3.0 small form factor+outline.++4+00:00:11,200 --> 00:00:15,952+Along the outer edge sit four Amphenol+OCuLink receptacles,++5+00:00:15,952 --> 00:00:18,046+one for each PCIe x4 port.++6+00:00:18,300 --> 00:00:21,973+There was no Adom component page for this+connector, so Claude made one.++7+00:00:22,093 --> 00:00:23,217+We will look at it in a moment.++8+00:00:23,467 --> 00:00:25,260+Just behind the connectors,++9+00:00:25,260 --> 00:00:29,977+a TI ESD array guards each port's reset+and clock lines against static.++10+00:00:30,233 --> 00:00:32,215+On the left edge is the control logic.++11+00:00:32,335 --> 00:00:36,624+The SN74LVC125 buffers each port's reset+line,++12+00:00:36,624 --> 00:00:42,497+and the TPS3808 tells the server when the+card's power is good.++13+00:00:42,733 --> 00:00:45,300+This shift register is the OCP scan chain,++14+00:00:45,300 --> 00:00:49,090+which the server reads for the card's+present and status bits.++15+00:00:49,210 --> 00:00:54,690+Next to it, an EEPROM holds the card's+identity, the second new Adom component+page.++16+00:00:54,933 --> 00:00:57,419+At the other end are the gold fingers:++17+00:00:57,419 --> 00:01:01,475+one hundred sixty eight contacts that plug+into the AIOM slot.++18+00:01:01,733 --> 00:01:07,029+Underneath, the silkscreen names the card,+says to set the slot to 4x4 in the BIOS,++19+00:01:07,029 --> 00:01:08,879+and points back to this page.++20+00:01:09,133 --> 00:01:11,724+That is the whole card: passive, four+ports,++21+00:01:11,724 --> 00:01:14,491+and ready to order from the files on this+page.++22+00:01:14,733 --> 00:01:16,678+Now the two component pages Claude made.++23+00:01:16,798 --> 00:01:19,130+First, the Amphenol OCuLink receptacle,++24+00:01:19,130 --> 00:01:22,838+with its Mouser and DigiKey part numbers+so it can be ordered.++25+00:01:23,100 --> 00:01:26,974+Its 3D model is a simplified body built+from Amphenol's drawing,++26+00:01:26,974 --> 00:01:30,183+because the real model sits behind an+Amphenol login.++27+00:01:30,433 --> 00:01:34,496+The page carries the full pinout from the+SFF-9402 spec:++28+00:01:34,496 --> 00:01:39,357+the transmit and receive pairs, the+reference clock, and the reset.++29+00:01:39,600 --> 00:01:43,568+And a KiCad symbol and footprint drawn+from Amphenol's land pattern,++30+00:01:43,568 --> 00:01:45,318+ready for anyone's next board.++31+00:01:45,567 --> 00:01:48,676+A provenance section lists where every+file came from,++32+00:01:48,676 --> 00:01:51,267+and says plainly which parts were made by+AI.++33+00:01:51,533 --> 00:01:57,089+Second, the ROHM 64 kbit EEPROM that+stores the card's identity for the server.++34+00:01:57,333 --> 00:02:03,321+A standard SOP-8 package, with a generic+body from KiCad's 3D library.++35+00:02:03,567 --> 00:02:06,034+Every pin is listed from ROHM's datasheet,++36+00:02:06,034 --> 00:02:08,912+including the address pins and the write+protect.++37+00:02:09,167 --> 00:02:10,735+Plus its symbol and footprint.++38+00:02:10,855 --> 00:02:15,065+Both pages are public, so the next design+that needs these parts can just use them.
video/oculink-riser-tour.video.jsonadded+36@@ -0,0 +1,36 @@+{+ "video": "/john/oculink-aiom-riser/render/video/oculink-riser-tour.mp4",+ "title": "3D tour of the card and its new component pages",+ "poster": "/john/oculink-aiom-riser/render/video/oculink-riser-tour-poster.jpg",+ "chapters": [+ {+ "t": 0.0,+ "title": "The finished card"+ },+ {+ "t": 11.2,+ "title": "Four OCuLink ports"+ },+ {+ "t": 30.23,+ "title": "Control logic"+ },+ {+ "t": 54.93,+ "title": "Gold fingers"+ },+ {+ "t": 61.73,+ "title": "Underside"+ },+ {+ "t": 74.73,+ "title": "New page: OCuLink receptacle"+ },+ {+ "t": 111.53,+ "title": "New page: FRU EEPROM"+ }+ ],+ "captions": "WEBVTT\n\n00:00:00.000 --> 00:00:03.354\nHere is the finished card in Adom's 3D\nviewer:\n\n00:00:03.354 --> 00:00:07.656\nseventy six by one hundred fifteen\nmillimeters, six layers,\n\n00:00:07.656 --> 00:00:10.937\ncut to the OCP 3.0 small form factor\noutline.\n\n00:00:11.200 --> 00:00:15.952\nAlong the outer edge sit four Amphenol\nOCuLink receptacles,\n\n00:00:15.952 --> 00:00:18.046\none for each PCIe x4 port.\n\n00:00:18.300 --> 00:00:21.973\nThere was no Adom component page for this\nconnector, so Claude made one.\n\n00:00:22.093 --> 00:00:23.217\nWe will look at it in a moment.\n\n00:00:23.467 --> 00:00:25.260\nJust behind the connectors,\n\n00:00:25.260 --> 00:00:29.977\na TI ESD array guards each port's reset\nand clock lines against static.\n\n00:00:30.233 --> 00:00:32.215\nOn the left edge is the control logic.\n\n00:00:32.335 --> 00:00:36.624\nThe SN74LVC125 buffers each port's reset\nline,\n\n00:00:36.624 --> 00:00:42.497\nand the TPS3808 tells the server when the\ncard's power is good.\n\n00:00:42.733 --> 00:00:45.300\nThis shift register is the OCP scan chain,\n\n00:00:45.300 --> 00:00:49.090\nwhich the server reads for the card's\npresent and status bits.\n\n00:00:49.210 --> 00:00:54.690\nNext to it, an EEPROM holds the card's\nidentity, the second new Adom component\npage.\n\n00:00:54.933 --> 00:00:57.419\nAt the other end are the gold fingers:\n\n00:00:57.419 --> 00:01:01.475\none hundred sixty eight contacts that plug\ninto the AIOM slot.\n\n00:01:01.733 --> 00:01:07.029\nUnderneath, the silkscreen names the card,\nsays to set the slot to 4x4 in the BIOS,\n\n00:01:07.029 --> 00:01:08.879\nand points back to this page.\n\n00:01:09.133 --> 00:01:11.724\nThat is the whole card: passive, four\nports,\n\n00:01:11.724 --> 00:01:14.491\nand ready to order from the files on this\npage.\n\n00:01:14.733 --> 00:01:16.678\nNow the two component pages Claude made.\n\n00:01:16.798 --> 00:01:19.130\nFirst, the Amphenol OCuLink receptacle,\n\n00:01:19.130 --> 00:01:22.838\nwith its Mouser and DigiKey part numbers\nso it can be ordered.\n\n00:01:23.100 --> 00:01:26.974\nIts 3D model is a simplified body built\nfrom Amphenol's drawing,\n\n00:01:26.974 --> 00:01:30.183\nbecause the real model sits behind an\nAmphenol login.\n\n00:01:30.433 --> 00:01:34.496\nThe page carries the full pinout from the\nSFF-9402 spec:\n\n00:01:34.496 --> 00:01:39.357\nthe transmit and receive pairs, the\nreference clock, and the reset.\n\n00:01:39.600 --> 00:01:43.568\nAnd a KiCad symbol and footprint drawn\nfrom Amphenol's land pattern,\n\n00:01:43.568 --> 00:01:45.318\nready for anyone's next board.\n\n00:01:45.567 --> 00:01:48.676\nA provenance section lists where every\nfile came from,\n\n00:01:48.676 --> 00:01:51.267\nand says plainly which parts were made by\nAI.\n\n00:01:51.533 --> 00:01:57.089\nSecond, the ROHM 64 kbit EEPROM that\nstores the card's identity for the server.\n\n00:01:57.333 --> 00:02:03.321\nA standard SOP-8 package, with a generic\nbody from KiCad's 3D library.\n\n00:02:03.567 --> 00:02:06.034\nEvery pin is listed from ROHM's datasheet,\n\n00:02:06.034 --> 00:02:08.912\nincluding the address pins and the write\nprotect.\n\n00:02:09.167 --> 00:02:10.735\nPlus its symbol and footprint.\n\n00:02:10.855 --> 00:02:15.065\nBoth pages are public, so the next design\nthat needs these parts can just use them.\n"+}
video/oculink-riser-tour.vttadded+142@@ -0,0 +1,142 @@+WEBVTT++00:00:00.000 --> 00:00:03.354+Here is the finished card in Adom's 3D+viewer:++00:00:03.354 --> 00:00:07.656+seventy six by one hundred fifteen+millimeters, six layers,++00:00:07.656 --> 00:00:10.937+cut to the OCP 3.0 small form factor+outline.++00:00:11.200 --> 00:00:15.952+Along the outer edge sit four Amphenol+OCuLink receptacles,++00:00:15.952 --> 00:00:18.046+one for each PCIe x4 port.++00:00:18.300 --> 00:00:21.973+There was no Adom component page for this+connector, so Claude made one.++00:00:22.093 --> 00:00:23.217+We will look at it in a moment.++00:00:23.467 --> 00:00:25.260+Just behind the connectors,++00:00:25.260 --> 00:00:29.977+a TI ESD array guards each port's reset+and clock lines against static.++00:00:30.233 --> 00:00:32.215+On the left edge is the control logic.++00:00:32.335 --> 00:00:36.624+The SN74LVC125 buffers each port's reset+line,++00:00:36.624 --> 00:00:42.497+and the TPS3808 tells the server when the+card's power is good.++00:00:42.733 --> 00:00:45.300+This shift register is the OCP scan chain,++00:00:45.300 --> 00:00:49.090+which the server reads for the card's+present and status bits.++00:00:49.210 --> 00:00:54.690+Next to it, an EEPROM holds the card's+identity, the second new Adom component+page.++00:00:54.933 --> 00:00:57.419+At the other end are the gold fingers:++00:00:57.419 --> 00:01:01.475+one hundred sixty eight contacts that plug+into the AIOM slot.++00:01:01.733 --> 00:01:07.029+Underneath, the silkscreen names the card,+says to set the slot to 4x4 in the BIOS,++00:01:07.029 --> 00:01:08.879+and points back to this page.++00:01:09.133 --> 00:01:11.724+That is the whole card: passive, four+ports,++00:01:11.724 --> 00:01:14.491+and ready to order from the files on this+page.++00:01:14.733 --> 00:01:16.678+Now the two component pages Claude made.++00:01:16.798 --> 00:01:19.130+First, the Amphenol OCuLink receptacle,++00:01:19.130 --> 00:01:22.838+with its Mouser and DigiKey part numbers+so it can be ordered.++00:01:23.100 --> 00:01:26.974+Its 3D model is a simplified body built+from Amphenol's drawing,++00:01:26.974 --> 00:01:30.183+because the real model sits behind an+Amphenol login.++00:01:30.433 --> 00:01:34.496+The page carries the full pinout from the+SFF-9402 spec:++00:01:34.496 --> 00:01:39.357+the transmit and receive pairs, the+reference clock, and the reset.++00:01:39.600 --> 00:01:43.568+And a KiCad symbol and footprint drawn+from Amphenol's land pattern,++00:01:43.568 --> 00:01:45.318+ready for anyone's next board.++00:01:45.567 --> 00:01:48.676+A provenance section lists where every+file came from,++00:01:48.676 --> 00:01:51.267+and says plainly which parts were made by+AI.++00:01:51.533 --> 00:01:57.089+Second, the ROHM 64 kbit EEPROM that+stores the card's identity for the server.++00:01:57.333 --> 00:02:03.321+A standard SOP-8 package, with a generic+body from KiCad's 3D library.++00:02:03.567 --> 00:02:06.034+Every pin is listed from ROHM's datasheet,++00:02:06.034 --> 00:02:08.912+including the address pins and the write+protect.++00:02:09.167 --> 00:02:10.735+Plus its symbol and footprint.++00:02:10.855 --> 00:02:15.065+Both pages are public, so the next design+that needs these parts can just use them.
video/oculink-riser.chapters.json+7−7@@ -4,31 +4,31 @@ "title": "The request" }, {- "t": 8.6,+ "t": 8.27, "title": "What this board does" }, {- "t": 85.77,+ "t": 83.77, "title": "Spec research and impedance" }, {- "t": 103.07,+ "t": 100.4, "title": "Routing the high-speed lanes" }, {- "t": 128.37,+ "t": 125.7, "title": "The board in KiCad" }, {- "t": 144.83,+ "t": 142.17, "title": "Current and thermal checks" }, {- "t": 156.1,+ "t": 153.07, "title": "Silkscreen and 3D" }, {- "t": 162.43,+ "t": 159.4, "title": "Export and the finish line" } ]
video/oculink-riser.mp4⋯ 1 unchanged line ⋯
video/oculink-riser.srtadded+228@@ -0,0 +1,228 @@+1+00:00:00,000 --> 00:00:05,709+A YouTube viewer asked for an OCuLink+riser for the AIOM slot on their+Supermicro server.++2+00:00:05,829 --> 00:00:08,015+Before we build it, here is what that+means.++3+00:00:08,267 --> 00:00:12,287+This is the kind of server the viewer has:+a Supermicro rack server.++4+00:00:12,407 --> 00:00:15,696+Inside, besides the normal PCIe slots,++5+00:00:15,696 --> 00:00:20,110+newer Supermicro boards have one or two+AIOM slots.++6+00:00:20,367 --> 00:00:27,982+From the back, Supermicro labels them:+PCIe x16, AIOM, OCP 3.0.++7+00:00:28,102 --> 00:00:32,050+A full sixteen lane slot, the same+bandwidth as a graphics card slot.++8+00:00:32,300 --> 00:00:36,651+But only one kind of card fits: an AIOM+network card like this one.++9+00:00:36,771 --> 00:00:40,469+If you don't need another network card,+those sixteen lanes sit unused.++10+00:00:40,733 --> 00:00:41,733+This board changes that.++11+00:00:41,853 --> 00:00:46,187+It plugs into the AIOM slot in place of+the network card,++12+00:00:46,187 --> 00:00:52,193+and splits the sixteen lanes into four+OCuLink ports, each a full PCIe x4 link.++13+00:00:52,433 --> 00:00:56,424+Run an OCuLink cable from each port to a+U.2 NVMe drive,++14+00:00:56,424 --> 00:01:02,054+and the server gains four more fast+drives, each running at full Gen 4x4+speed,++15+00:01:02,054 --> 00:01:04,406+about eight gigabytes per second.++16+00:01:04,667 --> 00:01:07,881+Or cable a port to an OCuLink dock like+this one,++17+00:01:07,881 --> 00:01:13,063+and hang a graphics card or another PCIe+card off the server, outside the case.++18+00:01:13,300 --> 00:01:17,992+There is one catch: the server's BIOS has+to support splitting that slot four ways.++19+00:01:18,112 --> 00:01:23,530+When it does, an unused network slot+becomes four general purpose PCIe ports.++20+00:01:23,767 --> 00:01:24,318+Now the build.++21+00:01:24,438 --> 00:01:27,747+We typed that one request into Claude, in+Adom Hydrogen.++22+00:01:27,867 --> 00:01:33,558+It reads the OCP 3.0 spec and the OCuLink+standards, pinout tables and all.++23+00:01:33,800 --> 00:01:40,135+It writes a small field solver and finds+trace widths for 85 ohm differential pairs+on a six layer stack-up.++24+00:01:40,400 --> 00:01:45,475+Thirty six high speed pairs are routed+from the gold fingers to four OCuLink+connectors,++25+00:01:45,475 --> 00:01:46,513+with no crossings.++26+00:01:46,767 --> 00:01:51,764+Every lane in a port is tuned to arrive+within a hundredth of a picosecond of its+neighbors.++27+00:01:51,1000 --> 00:01:54,350+The design record: impedance per layer,++28+00:01:54,350 --> 00:01:57,964+skew inside every pair under two+hundredths of a millimeter.++29+00:01:58,200 --> 00:02:03,295+On the adom-aiflow timeline, the run moves+through design rules:++30+00:02:03,295 --> 00:02:05,444+JLCPCB's six layer process.++31+00:02:05,700 --> 00:02:09,690+Then the real board opens in KiCad: gold+fingers at the bottom,++32+00:02:09,690 --> 00:02:11,084+connectors at the top.++33+00:02:11,333 --> 00:02:16,207+Forty seven parts land live, one at a+time, each its own undo step.++34+00:02:16,467 --> 00:02:19,469+Then one hundred sixty nine traces land+the same way,++35+00:02:19,469 --> 00:02:21,904+every one checked against the design+rules.++36+00:02:22,167 --> 00:02:24,366+The current check needs a real field+solve.++37+00:02:24,486 --> 00:02:26,036+Claude finds why it fails:++38+00:02:26,036 --> 00:02:29,495+a tenth of a millimeter via ring the+solver could not see.++39+00:02:29,733 --> 00:02:32,813+With a finer grid, current and thermal+both pass.++40+00:02:33,067 --> 00:02:36,992+Clean silkscreen, and the finished board+in KiCad's 3D viewer:++41+00:02:36,992 --> 00:02:39,145+every test point and port labeled.++42+00:02:39,400 --> 00:02:42,229+Gerbers for all six copper layers, drill+files,++43+00:02:42,229 --> 00:02:44,697+pick and place and the bill of materials,++44+00:02:44,697 --> 00:02:47,405+each read back and checked against the+board.++45+00:02:47,667 --> 00:02:51,766+Finish passes: zero design rule errors,+zero unconnected.++46+00:02:51,886 --> 00:02:56,297+A manufacturable PCI Express Gen4 card,+from a one line comment,++47+00:02:56,297 --> 00:02:59,606+designed and checked by Claude in Adom+Hydrogen.
video/oculink-riser.video.json+9−8@@ -1,5 +1,6 @@ { "video": "/john/oculink-aiom-riser/render/video/oculink-riser.mp4",+ "title": "An OCuLink riser for the Supermicro AIOM slot, built by AI", "poster": "/john/oculink-aiom-riser/render/video/oculink-riser-poster.jpg", "chapters": [ {@@ -7,33 +8,33 @@ "title": "The request" }, {- "t": 8.6,+ "t": 8.27, "title": "What this board does" }, {- "t": 85.77,+ "t": 83.77, "title": "Spec research and impedance" }, {- "t": 103.07,+ "t": 100.4, "title": "Routing the high-speed lanes" }, {- "t": 128.37,+ "t": 125.7, "title": "The board in KiCad" }, {- "t": 144.83,+ "t": 142.17, "title": "Current and thermal checks" }, {- "t": 156.1,+ "t": 153.07, "title": "Silkscreen and 3D" }, {- "t": 162.43,+ "t": 159.4, "title": "Export and the finish line" } ],- "captions": "WEBVTT\n\n00:00:00.000 --> 00:00:04.429\nA YouTube viewer asked for an OCuLink\nriser for the AIOM slot on their\n\n00:00:04.429 --> 00:00:05.568\nSupermicro server.\n\n00:00:05.568 --> 00:00:08.352\nBefore we build it, here is what that\nmeans.\n\n00:00:08.600 --> 00:00:11.815\nThis is the kind of server the viewer has:\n\n00:00:11.815 --> 00:00:13.729\na Supermicro rack server.\n\n00:00:13.729 --> 00:00:19.930\nInside, besides the normal P C I e slots,\nnewer Supermicro boards have one or two\n\n00:00:19.930 --> 00:00:20.772\nAIOM slots.\n\n00:00:21.033 --> 00:00:24.263\nFrom the back, Supermicro labels them:\n\n00:00:24.263 --> 00:00:27.153\nP C I e by sixteen, AIOM, OCP 3.0.\n\n00:00:27.153 --> 00:00:33.018\nA full sixteen lane slot, the same\nbandwidth as a graphics card slot.\n\n00:00:33.267 --> 00:00:35.195\nBut only one kind of card fits:\n\n00:00:35.195 --> 00:00:37.371\nan AIOM network card like this one.\n\n00:00:37.371 --> 00:00:41.786\nIf you don't need another network card,\nthose sixteen lanes sit unused.\n\n00:00:42.033 --> 00:00:43.718\nThis board changes that.\n\n00:00:43.718 --> 00:00:49.336\nIt plugs into the AIOM slot in place of\nthe network card, and splits the sixteen\n\n00:00:49.336 --> 00:00:53.831\nlanes into four OCuLink ports, each a full\nP C I e by four link.\n\n00:00:54.067 --> 00:00:59.497\nRun an OCuLink cable from each port to a U\ndot two NVMe drive, and the server gains\n\n00:00:59.497 --> 00:01:04.665\nfour more fast drives, each running at\nfull Gen four by four speed, about eight\n\n00:01:04.665 --> 00:01:06.039\ngigabytes per second.\n\n00:01:06.300 --> 00:01:11.235\nOr cable a port to an OCuLink dock like\nthis one, and hang a graphics card or\n\n00:01:11.235 --> 00:01:14.697\nanother P C I e card off the server,\noutside the case.\n\n00:01:14.933 --> 00:01:16.181\nThere is one catch:\n\n00:01:16.181 --> 00:01:20.318\nthe server's BIOS has to support splitting\nthat slot four ways.\n\n00:01:20.318 --> 00:01:25.113\nWhen it does, an unused network slot\nbecomes four general purpose P C I e\n\n00:01:25.113 --> 00:01:25.507\nports.\n\n00:01:25.767 --> 00:01:26.777\nNow the build.\n\n00:01:26.777 --> 00:01:30.815\nWe typed that one request into Claude, in\nAdom Hydrogen.\n\n00:01:30.815 --> 00:01:36.223\nIt reads the OCP 3.0 spec and the OCuLink\nstandards, pinout tables and all.\n\n00:01:36.467 --> 00:01:41.381\nIt writes a small field solver and finds\ntrace widths for 85 ohm differential pairs\n\n00:01:41.381 --> 00:01:42.802\non a six layer stack-up.\n\n00:01:43.067 --> 00:01:47.450\nThirty six high speed pairs are routed\nfrom the gold fingers to four OCuLink\n\n00:01:47.450 --> 00:01:49.180\nconnectors, with no crossings.\n\n00:01:49.433 --> 00:01:53.881\nEvery lane in a port is tuned to arrive\nwithin a hundredth of a picosecond of its\n\n00:01:53.881 --> 00:01:54.431\nneighbors.\n\n00:01:54.667 --> 00:01:55.751\nThe design record:\n\n00:01:55.751 --> 00:02:00.631\nimpedance per layer, skew inside every\npair under two hundredths of a millimeter.\n\n00:02:00.867 --> 00:02:05.962\nOn the adom-aiflow timeline, the run moves\nthrough design rules:\n\n00:02:05.962 --> 00:02:08.111\nJLCPCB's six layer process.\n\n00:02:08.367 --> 00:02:10.584\nThen the real board opens in KiCad:\n\n00:02:10.584 --> 00:02:13.751\ngold fingers at the bottom, connectors at\nthe top.\n\n00:02:14.000 --> 00:02:18.874\nForty seven parts land live, one at a\ntime, each its own undo step.\n\n00:02:19.133 --> 00:02:23.607\nThen one hundred sixty nine traces land\nthe same way, every one checked against\n\n00:02:23.607 --> 00:02:24.570\nthe design rules.\n\n00:02:24.833 --> 00:02:27.430\nThe current check needs a real field\nsolve.\n\n00:02:27.430 --> 00:02:29.001\nClaude finds why it fails:\n\n00:02:29.001 --> 00:02:32.504\na tenth of a millimeter via ring the\nsolver could not see.\n\n00:02:32.767 --> 00:02:35.846\nWith a finer grid, current and thermal\nboth pass.\n\n00:02:36.100 --> 00:02:40.025\nClean silkscreen, and the finished board\nin KiCad's 3D viewer:\n\n00:02:40.025 --> 00:02:42.178\nevery test point and port labeled.\n\n00:02:42.433 --> 00:02:47.093\nGerbers for all six copper layers, drill\nfiles, pick and place and the bill of\n\n00:02:47.093 --> 00:02:50.438\nmaterials, each read back and checked\nagainst the board.\n\n00:02:50.700 --> 00:02:51.697\nFinish passes:\n\n00:02:51.697 --> 00:02:54.689\nzero design rule errors, zero unconnected.\n\n00:02:54.689 --> 00:03:00.175\nA manufacturable PCI Express Gen four\ncard, from a one line comment, designed\n\n00:03:00.175 --> 00:03:02.953\nand checked by Claude in Adom Hydrogen.\n\n"+ "captions": "WEBVTT\n\n00:00:00.000 --> 00:00:05.709\nA YouTube viewer asked for an OCuLink\nriser for the AIOM slot on their\nSupermicro server.\n\n00:00:05.829 --> 00:00:08.015\nBefore we build it, here is what that\nmeans.\n\n00:00:08.267 --> 00:00:12.287\nThis is the kind of server the viewer has:\na Supermicro rack server.\n\n00:00:12.407 --> 00:00:15.696\nInside, besides the normal PCIe slots,\n\n00:00:15.696 --> 00:00:20.110\nnewer Supermicro boards have one or two\nAIOM slots.\n\n00:00:20.367 --> 00:00:27.982\nFrom the back, Supermicro labels them:\nPCIe x16, AIOM, OCP 3.0.\n\n00:00:28.102 --> 00:00:32.050\nA full sixteen lane slot, the same\nbandwidth as a graphics card slot.\n\n00:00:32.300 --> 00:00:36.651\nBut only one kind of card fits: an AIOM\nnetwork card like this one.\n\n00:00:36.771 --> 00:00:40.469\nIf you don't need another network card,\nthose sixteen lanes sit unused.\n\n00:00:40.733 --> 00:00:41.733\nThis board changes that.\n\n00:00:41.853 --> 00:00:46.187\nIt plugs into the AIOM slot in place of\nthe network card,\n\n00:00:46.187 --> 00:00:52.193\nand splits the sixteen lanes into four\nOCuLink ports, each a full PCIe x4 link.\n\n00:00:52.433 --> 00:00:56.424\nRun an OCuLink cable from each port to a\nU.2 NVMe drive,\n\n00:00:56.424 --> 00:01:02.054\nand the server gains four more fast\ndrives, each running at full Gen 4x4\nspeed,\n\n00:01:02.054 --> 00:01:04.406\nabout eight gigabytes per second.\n\n00:01:04.667 --> 00:01:07.881\nOr cable a port to an OCuLink dock like\nthis one,\n\n00:01:07.881 --> 00:01:13.063\nand hang a graphics card or another PCIe\ncard off the server, outside the case.\n\n00:01:13.300 --> 00:01:17.992\nThere is one catch: the server's BIOS has\nto support splitting that slot four ways.\n\n00:01:18.112 --> 00:01:23.530\nWhen it does, an unused network slot\nbecomes four general purpose PCIe ports.\n\n00:01:23.767 --> 00:01:24.318\nNow the build.\n\n00:01:24.438 --> 00:01:27.747\nWe typed that one request into Claude, in\nAdom Hydrogen.\n\n00:01:27.867 --> 00:01:33.558\nIt reads the OCP 3.0 spec and the OCuLink\nstandards, pinout tables and all.\n\n00:01:33.800 --> 00:01:40.135\nIt writes a small field solver and finds\ntrace widths for 85 ohm differential pairs\non a six layer stack-up.\n\n00:01:40.400 --> 00:01:45.475\nThirty six high speed pairs are routed\nfrom the gold fingers to four OCuLink\nconnectors,\n\n00:01:45.475 --> 00:01:46.513\nwith no crossings.\n\n00:01:46.767 --> 00:01:51.764\nEvery lane in a port is tuned to arrive\nwithin a hundredth of a picosecond of its\nneighbors.\n\n00:01:51.1000 --> 00:01:54.350\nThe design record: impedance per layer,\n\n00:01:54.350 --> 00:01:57.964\nskew inside every pair under two\nhundredths of a millimeter.\n\n00:01:58.200 --> 00:02:03.295\nOn the adom-aiflow timeline, the run moves\nthrough design rules:\n\n00:02:03.295 --> 00:02:05.444\nJLCPCB's six layer process.\n\n00:02:05.700 --> 00:02:09.690\nThen the real board opens in KiCad: gold\nfingers at the bottom,\n\n00:02:09.690 --> 00:02:11.084\nconnectors at the top.\n\n00:02:11.333 --> 00:02:16.207\nForty seven parts land live, one at a\ntime, each its own undo step.\n\n00:02:16.467 --> 00:02:19.469\nThen one hundred sixty nine traces land\nthe same way,\n\n00:02:19.469 --> 00:02:21.904\nevery one checked against the design\nrules.\n\n00:02:22.167 --> 00:02:24.366\nThe current check needs a real field\nsolve.\n\n00:02:24.486 --> 00:02:26.036\nClaude finds why it fails:\n\n00:02:26.036 --> 00:02:29.495\na tenth of a millimeter via ring the\nsolver could not see.\n\n00:02:29.733 --> 00:02:32.813\nWith a finer grid, current and thermal\nboth pass.\n\n00:02:33.067 --> 00:02:36.992\nClean silkscreen, and the finished board\nin KiCad's 3D viewer:\n\n00:02:36.992 --> 00:02:39.145\nevery test point and port labeled.\n\n00:02:39.400 --> 00:02:42.229\nGerbers for all six copper layers, drill\nfiles,\n\n00:02:42.229 --> 00:02:44.697\npick and place and the bill of materials,\n\n00:02:44.697 --> 00:02:47.405\neach read back and checked against the\nboard.\n\n00:02:47.667 --> 00:02:51.766\nFinish passes: zero design rule errors,\nzero unconnected.\n\n00:02:51.886 --> 00:02:56.297\nA manufacturable PCI Express Gen4 card,\nfrom a one line comment,\n\n00:02:56.297 --> 00:02:59.606\ndesigned and checked by Claude in Adom\nHydrogen.\n" }
video/oculink-riser.vtt+88−102@@ -1,197 +1,183 @@ WEBVTT -00:00:00.000 --> 00:00:04.429+00:00:00.000 --> 00:00:05.709 A YouTube viewer asked for an OCuLink riser for the AIOM slot on their--00:00:04.429 --> 00:00:05.568 Supermicro server. -00:00:05.568 --> 00:00:08.352+00:00:05.829 --> 00:00:08.015 Before we build it, here is what that means. -00:00:08.600 --> 00:00:11.815+00:00:08.267 --> 00:00:12.287 This is the kind of server the viewer has:--00:00:11.815 --> 00:00:13.729 a Supermicro rack server. -00:00:13.729 --> 00:00:19.930-Inside, besides the normal P C I e slots,-newer Supermicro boards have one or two+00:00:12.407 --> 00:00:15.696+Inside, besides the normal PCIe slots, -00:00:19.930 --> 00:00:20.772+00:00:15.696 --> 00:00:20.110+newer Supermicro boards have one or two AIOM slots. -00:00:21.033 --> 00:00:24.263+00:00:20.367 --> 00:00:27.982 From the back, Supermicro labels them:+PCIe x16, AIOM, OCP 3.0. -00:00:24.263 --> 00:00:27.153-P C I e by sixteen, AIOM, OCP 3.0.--00:00:27.153 --> 00:00:33.018+00:00:28.102 --> 00:00:32.050 A full sixteen lane slot, the same bandwidth as a graphics card slot. -00:00:33.267 --> 00:00:35.195-But only one kind of card fits:--00:00:35.195 --> 00:00:37.371-an AIOM network card like this one.+00:00:32.300 --> 00:00:36.651+But only one kind of card fits: an AIOM+network card like this one. -00:00:37.371 --> 00:00:41.786+00:00:36.771 --> 00:00:40.469 If you don't need another network card, those sixteen lanes sit unused. -00:00:42.033 --> 00:00:43.718+00:00:40.733 --> 00:00:41.733 This board changes that. -00:00:43.718 --> 00:00:49.336+00:00:41.853 --> 00:00:46.187 It plugs into the AIOM slot in place of-the network card, and splits the sixteen+the network card, -00:00:49.336 --> 00:00:53.831-lanes into four OCuLink ports, each a full-P C I e by four link.+00:00:46.187 --> 00:00:52.193+and splits the sixteen lanes into four+OCuLink ports, each a full PCIe x4 link. -00:00:54.067 --> 00:00:59.497-Run an OCuLink cable from each port to a U-dot two NVMe drive, and the server gains+00:00:52.433 --> 00:00:56.424+Run an OCuLink cable from each port to a+U.2 NVMe drive, -00:00:59.497 --> 00:01:04.665-four more fast drives, each running at-full Gen four by four speed, about eight+00:00:56.424 --> 00:01:02.054+and the server gains four more fast+drives, each running at full Gen 4x4+speed, -00:01:04.665 --> 00:01:06.039-gigabytes per second.+00:01:02.054 --> 00:01:04.406+about eight gigabytes per second. -00:01:06.300 --> 00:01:11.235+00:01:04.667 --> 00:01:07.881 Or cable a port to an OCuLink dock like-this one, and hang a graphics card or+this one, -00:01:11.235 --> 00:01:14.697-another P C I e card off the server,-outside the case.+00:01:07.881 --> 00:01:13.063+and hang a graphics card or another PCIe+card off the server, outside the case. -00:01:14.933 --> 00:01:16.181-There is one catch:+00:01:13.300 --> 00:01:17.992+There is one catch: the server's BIOS has+to support splitting that slot four ways. -00:01:16.181 --> 00:01:20.318-the server's BIOS has to support splitting-that slot four ways.--00:01:20.318 --> 00:01:25.113+00:01:18.112 --> 00:01:23.530 When it does, an unused network slot-becomes four general purpose P C I e--00:01:25.113 --> 00:01:25.507-ports.+becomes four general purpose PCIe ports. -00:01:25.767 --> 00:01:26.777+00:01:23.767 --> 00:01:24.318 Now the build. -00:01:26.777 --> 00:01:30.815+00:01:24.438 --> 00:01:27.747 We typed that one request into Claude, in Adom Hydrogen. -00:01:30.815 --> 00:01:36.223+00:01:27.867 --> 00:01:33.558 It reads the OCP 3.0 spec and the OCuLink standards, pinout tables and all. -00:01:36.467 --> 00:01:41.381+00:01:33.800 --> 00:01:40.135 It writes a small field solver and finds trace widths for 85 ohm differential pairs--00:01:41.381 --> 00:01:42.802 on a six layer stack-up. -00:01:43.067 --> 00:01:47.450+00:01:40.400 --> 00:01:45.475 Thirty six high speed pairs are routed from the gold fingers to four OCuLink+connectors, -00:01:47.450 --> 00:01:49.180-connectors, with no crossings.+00:01:45.475 --> 00:01:46.513+with no crossings. -00:01:49.433 --> 00:01:53.881+00:01:46.767 --> 00:01:51.764 Every lane in a port is tuned to arrive within a hundredth of a picosecond of its--00:01:53.881 --> 00:01:54.431 neighbors. -00:01:54.667 --> 00:01:55.751-The design record:+00:01:51.1000 --> 00:01:54.350+The design record: impedance per layer, -00:01:55.751 --> 00:02:00.631-impedance per layer, skew inside every-pair under two hundredths of a millimeter.+00:01:54.350 --> 00:01:57.964+skew inside every pair under two+hundredths of a millimeter. -00:02:00.867 --> 00:02:05.962+00:01:58.200 --> 00:02:03.295 On the adom-aiflow timeline, the run moves through design rules: -00:02:05.962 --> 00:02:08.111+00:02:03.295 --> 00:02:05.444 JLCPCB's six layer process. -00:02:08.367 --> 00:02:10.584-Then the real board opens in KiCad:+00:02:05.700 --> 00:02:09.690+Then the real board opens in KiCad: gold+fingers at the bottom, -00:02:10.584 --> 00:02:13.751-gold fingers at the bottom, connectors at-the top.+00:02:09.690 --> 00:02:11.084+connectors at the top. -00:02:14.000 --> 00:02:18.874+00:02:11.333 --> 00:02:16.207 Forty seven parts land live, one at a time, each its own undo step. -00:02:19.133 --> 00:02:23.607+00:02:16.467 --> 00:02:19.469 Then one hundred sixty nine traces land-the same way, every one checked against+the same way, -00:02:23.607 --> 00:02:24.570-the design rules.+00:02:19.469 --> 00:02:21.904+every one checked against the design+rules. -00:02:24.833 --> 00:02:27.430+00:02:22.167 --> 00:02:24.366 The current check needs a real field solve. -00:02:27.430 --> 00:02:29.001+00:02:24.486 --> 00:02:26.036 Claude finds why it fails: -00:02:29.001 --> 00:02:32.504+00:02:26.036 --> 00:02:29.495 a tenth of a millimeter via ring the solver could not see. -00:02:32.767 --> 00:02:35.846+00:02:29.733 --> 00:02:32.813 With a finer grid, current and thermal both pass. -00:02:36.100 --> 00:02:40.025+00:02:33.067 --> 00:02:36.992 Clean silkscreen, and the finished board in KiCad's 3D viewer: -00:02:40.025 --> 00:02:42.178+00:02:36.992 --> 00:02:39.145 every test point and port labeled. -00:02:42.433 --> 00:02:47.093+00:02:39.400 --> 00:02:42.229 Gerbers for all six copper layers, drill-files, pick and place and the bill of--00:02:47.093 --> 00:02:50.438-materials, each read back and checked-against the board.+files, -00:02:50.700 --> 00:02:51.697-Finish passes:+00:02:42.229 --> 00:02:44.697+pick and place and the bill of materials, -00:02:51.697 --> 00:02:54.689-zero design rule errors, zero unconnected.+00:02:44.697 --> 00:02:47.405+each read back and checked against the+board. -00:02:54.689 --> 00:03:00.175-A manufacturable PCI Express Gen four-card, from a one line comment, designed+00:02:47.667 --> 00:02:51.766+Finish passes: zero design rule errors,+zero unconnected. -00:03:00.175 --> 00:03:02.953-and checked by Claude in Adom Hydrogen.+00:02:51.886 --> 00:02:56.297+A manufacturable PCI Express Gen4 card,+from a one line comment, +00:02:56.297 --> 00:02:59.606+designed and checked by Claude in Adom+Hydrogen.