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OCuLink Riser for the Supermicro AIOM Slot
Public Unreviewedby John Lauer
Passive OCP NIC 3.0 SFF card that breaks a Supermicro AIOM slot's PCIe x16 into four OCuLink 4i ports (4 x4, Gen4): 6-layer, 85 ohm, length-matched, DRC-clean KiCad project with Gerbers, BOM and CPL.
main
John Lauer
The finished riser: KiCad project, Gerbers/BOM/CPL, design record, renders and analysis
09d929e
7d ago
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"x": 53.574,
"y": 110.9,
"height": 0.8,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "finger pin number at the start of its group (top = B side)"
},
{
"text": "A43",
"layer": "B.SilkS",
"x": 53.517,
"y": 110.9,
"height": 0.8,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "finger pin number at the start of its group (bottom = A side)"
},
{
"text": "B70",
"layer": "F.SilkS",
"x": 67.54,
"y": 110.9,
"height": 0.8,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "finger pin number at the end of its group (top = B side)"
},
{
"text": "A70",
"layer": "B.SilkS",
"x": 67.597,
"y": 110.9,
"height": 0.8,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "finger pin number at the end of its group (bottom = A side)"
},
{
"text": "PORT 0",
"layer": "B.SilkS",
"x": 16.1,
"y": 12.0,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J2 port number, bottom face"
},
{
"text": "PORT 1",
"layer": "B.SilkS",
"x": 30.7,
"y": 12.0,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J3 port number, bottom face"
},
{
"text": "PORT 2",
"layer": "B.SilkS",
"x": 45.3,
"y": 12.0,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J4 port number, bottom face"
},
{
"text": "PORT 3",
"layer": "B.SilkS",
"x": 59.9,
"y": 12.0,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J5 port number, bottom face"
},
{
"text": "TP11 SCLK",
"layer": "F.SilkS",
"x": 10.05,
"y": 106.79,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "left",
"why": "TP11 with its function, beside its pad at the stub"
},
{
"text": "D1 3V3",
"layer": "F.SilkS",
"x": 6.05,
"y": 25.427,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "D1 with its function"
},
{
"text": "D2 12V",
"layer": "F.SilkS",
"x": 11.238,
"y": 28.0,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "D2 with its function"
},
{
"text": "J2 PORT 0",
"layer": "F.SilkS",
"x": 16.1,
"y": 11.743,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J2 with its function"
},
{
"text": "J3 PORT 1",
"layer": "F.SilkS",
"x": 30.7,
"y": 11.743,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J3 with its function"
},
{
"text": "J4 PORT 2",
"layer": "F.SilkS",
"x": 45.3,
"y": 11.743,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J4 with its function"
},
{
"text": "J5 PORT 3",
"layer": "F.SilkS",
"x": 59.9,
"y": 11.743,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "J5 with its function"
},
{
"text": "JP1 FRU WRITE",
"layer": "F.SilkS",
"x": 12.934,
"y": 78.2,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "JP1 with its function"
},
{
"text": "TP7 PERST0",
"layer": "F.SilkS",
"x": 14.601,
"y": 14.991,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP7 with its function"
},
{
"text": "TP8 PERST1",
"layer": "F.SilkS",
"x": 23.251,
"y": 25.709,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP8 with its function"
},
{
"text": "TP9 PERST2",
"layer": "F.SilkS",
"x": 34.701,
"y": 28.209,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP9 with its function"
},
{
"text": "TP10 PERST3",
"layer": "F.SilkS",
"x": 52.451,
"y": 28.209,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP10 with its function"
},
{
"text": "TP6 PWRGD",
"layer": "F.SilkS",
"x": 7.501,
"y": 45.609,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP6 with its function"
},
{
"text": "TP1 3V3",
"layer": "F.SilkS",
"x": 6.349,
"y": 84.905,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP1 with its function"
},
{
"text": "TP2 GND",
"layer": "F.SilkS",
"x": 9.232,
"y": 88.4,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP2 with its function"
},
{
"text": "TP3 SMCLK",
"layer": "F.SilkS",
"x": 10.16,
"y": 94.7,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP3 with its function"
},
{
"text": "TP4 SMDAT",
"layer": "F.SilkS",
"x": 10.065,
"y": 96.8,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP4 with its function"
},
{
"text": "TP5 12V",
"layer": "F.SilkS",
"x": 6.349,
"y": 100.295,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP5 with its function"
},
{
"text": "TP12 SDOUT",
"layer": "F.SilkS",
"x": 10.233,
"y": 104.644,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "TP12 with its function"
},
{
"text": "R11-R14 33 R15-R18 100k",
"layer": "B.SilkS",
"x": 14.7,
"y": 42.431,
"height": 0.8,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "values of the PERST# resistor block, under it on the bottom face"
},
{
"text": "OCP NIC 3.0 SFF > 4x OCuLink 4i",
"layer": "B.SilkS",
"x": 38.0,
"y": 40.0,
"height": 1.6,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "board identity / service note"
},
{
"text": "PCIe Gen4 x16 as 4 x4 rev A",
"layer": "B.SilkS",
"x": 38.0,
"y": 44.54,
"height": 1.2,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "board identity / service note"
},
{
"text": "Set the slot to x4x4x4x4 in BIOS",
"layer": "B.SilkS",
"x": 38.0,
"y": 46.82,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "board identity / service note"
},
{
"text": "wiki.adom.inc/john/oculink-aiom-riser",
"layer": "B.SilkS",
"x": 38.0,
"y": 48.72,
"height": 1.0,
"stroke": 0.15,
"rotation": 0,
"align": "center",
"why": "board identity / service note"
}
],
"unresolved": [
"R11-R18: values are keyed on the bottom face under the block (no top-side room)"
]
}