board
OCuLink Riser for the Supermicro AIOM Slot
Public Unreviewedby John Lauer
Passive OCP NIC 3.0 SFF card that breaks a Supermicro AIOM slot's PCIe x16 into four OCuLink 4i ports (4 x4, Gen4): 6-layer, 85 ohm, length-matched, DRC-clean KiCad project with Gerbers, BOM and CPL.
main
John Lauer
Highlight v2: what the card is for, captions and chapters in the adom-video player
0c50ebd
7d ago
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WEBVTT
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A YouTube viewer asked for an OCuLink
riser for the AIOM slot on their
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Supermicro server.
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Before we build it, here is what that
means.
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This is the kind of server the viewer has:
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a Supermicro rack server.
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Inside, besides the normal P C I e slots,
newer Supermicro boards have one or two
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AIOM slots.
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From the back, Supermicro labels them:
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P C I e by sixteen, AIOM, OCP 3.0.
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A full sixteen lane slot, the same
bandwidth as a graphics card slot.
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But only one kind of card fits:
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an AIOM network card like this one.
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If you don't need another network card,
those sixteen lanes sit unused.
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This board changes that.
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It plugs into the AIOM slot in place of
the network card, and splits the sixteen
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lanes into four OCuLink ports, each a full
P C I e by four link.
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Run an OCuLink cable from each port to a U
dot two NVMe drive, and the server gains
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four more fast drives, each running at
full Gen four by four speed, about eight
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gigabytes per second.
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Or cable a port to an OCuLink dock like
this one, and hang a graphics card or
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another P C I e card off the server,
outside the case.
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There is one catch:
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the server's BIOS has to support splitting
that slot four ways.
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When it does, an unused network slot
becomes four general purpose P C I e
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ports.
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Now the build.
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We typed that one request into Claude, in
Adom Hydrogen.
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It reads the OCP 3.0 spec and the OCuLink
standards, pinout tables and all.
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It writes a small field solver and finds
trace widths for 85 ohm differential pairs
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on a six layer stack-up.
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Thirty six high speed pairs are routed
from the gold fingers to four OCuLink
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connectors, with no crossings.
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Every lane in a port is tuned to arrive
within a hundredth of a picosecond of its
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neighbors.
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The design record:
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impedance per layer, skew inside every
pair under two hundredths of a millimeter.
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On the adom-aiflow timeline, the run moves
through design rules:
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JLCPCB's six layer process.
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Then the real board opens in KiCad:
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gold fingers at the bottom, connectors at
the top.
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Forty seven parts land live, one at a
time, each its own undo step.
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Then one hundred sixty nine traces land
the same way, every one checked against
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the design rules.
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The current check needs a real field
solve.
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Claude finds why it fails:
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a tenth of a millimeter via ring the
solver could not see.
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With a finer grid, current and thermal
both pass.
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Clean silkscreen, and the finished board
in KiCad's 3D viewer:
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every test point and port labeled.
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Gerbers for all six copper layers, drill
files, pick and place and the bill of
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materials, each read back and checked
against the board.
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Finish passes:
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zero design rule errors, zero unconnected.
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A manufacturable PCI Express Gen four
card, from a one line comment, designed
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and checked by Claude in Adom Hydrogen.