nRF54L15

{
  "datasheet": {
    "fetched_at": null,
    "page_count": 845,
    "path": "/home/adom/project/chip-fetcher/library/nRF54L15/nRF54L15.pdf",
    "sha256": "5bc17ab3a9cc0b86212f8a0d4383d11f96f847f85f0bf5bdf544b965163c1abf",
    "source_host": null,
    "source_tier": null,
    "url": null
  },
  "footprint": {
    "dimension_provenance": [
      {
        "field": "bodyDimensions.x",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 6.0
      },
      {
        "field": "bodyDimensions.y",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 6.0
      },
      {
        "field": "bodyDimensions.thickness_max",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 0.9
      },
      {
        "field": "leadDimensions.pad_h",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 0.4
      },
      {
        "field": "leadDimensions.pad_w",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 0.2
      },
      {
        "field": "leadDimensions.pitch_x",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 0.4
      },
      {
        "field": "leadDimensions.pitch_y",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": 0.4
      },
      {
        "field": "leadDimensions.thermal_pad",
        "figure_label": "Figure 167: QFN48 6x6 mm package",
        "page": 806,
        "value": {
          "figure_label": "Figure 167: QFN48 6x6 mm package",
          "source_page": 806,
          "x": 4.6,
          "y": 4.6
        }
      }
    ],
    "kicad_baseline": null,
    "kicad_baseline_search_attempts": [
      {
        "library": "Package_DFN_QFN",
        "name": "QFN-48-1EP_6x6mm_P0.5mm_EP3.2x3.2mm",
        "result": "404"
      },
      {
        "library": "Package_DFN_QFN",
        "name": "QFN-48-1EP_6x6mm_P0.4mm_EP3.2x3.2mm",
        "result": "404"
      },
      {
        "library": "Package_DFN_QFN",
        "name": "QFN-48_6x6mm_P0.5mm",
        "result": "404"
      }
    ],
    "package_name_provenance": {
      "info_json_used": true,
      "info_json_value": "QFN-48 (QFAA) 6x6mm",
      "is_standard_jedec": true,
      "page": 806,
      "value": "QFN-48"
    }
  },
  "manufacturer": "Nordic Semiconductor",
  "mpn": "nRF54L15",
  "review_required": [
    {
      "pins": [
        "11",
        "12",
        "13",
        "14",
        "15",
        "16",
        "17",
        "18",
        "19",
        "20",
        "21"
      ],
      "reason": "muxed_pin_protocol_select"
    },
    {
      "pins": [
        "3",
        "4"
      ],
      "reason": "muxed_pin_protocol_select"
    },
    {
      "pins": [
        "1",
        "2",
        "9"
      ],
      "reason": "muxed_pin_protocol_select"
    },
    {
      "pins": [
        "33",
        "43"
      ],
      "reason": "tied_decoupling_pair"
    },
    {
      "package": "QFN-48 6x6 mm (QFAA) — Nordic publishes reference PCB layouts as separate Altium files on the product page; pad_w/pad_h here are taken from the QFN48 package lead dimensions (b, L), not from an explicit recommended land pattern",
      "reason": "datasheet_omits_recommended_land_pattern_dimensions"
    }
  ],
  "schema_version": "1",
  "symbol": {
    "groups_emitted": [
      "POWER",
      "GROUND",
      "GPIO",
      "DEBUG",
      "CONTROL",
      "TIMING",
      "RF"
    ],
    "pin_provenance": [
      {
        "confidence": "high",
        "notes": "Mux: digital GPIO vs. XL1 (LFXO analog input). Pin function selected via the LFXO/GPIO configuration.",
        "page": 797,
        "pin_name": "P1.00/XL1",
        "pin_number": "1",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: digital GPIO vs. XL2 (LFXO analog).",
        "page": 797,
        "pin_name": "P1.01/XL2",
        "pin_number": "2",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "NFC antenna pin from reset; protocol select via NFCT enable.",
        "page": 797,
        "pin_name": "P1.02/NFC1",
        "pin_number": "3",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin. NFC antenna from reset.",
        "page": 797,
        "pin_name": "P1.03/NFC2",
        "pin_number": "4",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / AIN0 (SAADC analog) / TAMPC ASO[0]. Clock pin.",
        "page": 797,
        "pin_name": "P1.04/AIN0/TAMPC",
        "pin_number": "5",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / AIN1 / TAMPC ASI[0] / RADIO DFEGPIO[6].",
        "page": 797,
        "pin_name": "P1.05/AIN1/TAMPC",
        "pin_number": "6",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / AIN2 / TAMPC ASO[1].",
        "page": 797,
        "pin_name": "P1.06/AIN2/TAMPC",
        "pin_number": "7",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / AIN3 / TAMPC ASI[1].",
        "page": 797,
        "pin_name": "P1.07/AIN3/TAMPC",
        "pin_number": "8",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / CLK16M output / EXTREF analog input. Clock pin.",
        "page": 797,
        "pin_name": "P1.08/CLK16M/TAMPC",
        "pin_number": "9",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 797,
        "pin_name": "VDD",
        "pin_number": "10",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: GPIO / SPIM00/20 DCX / UARTE00/20 RXD / FLPR QSPI D3.",
        "page": 797,
        "pin_name": "P2.00",
        "pin_number": "11",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin. Required pin for SPI SCK / QSPI SCK.",
        "page": 797,
        "pin_name": "P2.01/SPI.SCK",
        "pin_number": "12",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Mux: SPIM/SPIS SDO / UARTE TXD / QSPI D0 / SWO.",
        "page": 798,
        "pin_name": "P2.02",
        "pin_number": "13",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 798,
        "pin_name": "P2.03",
        "pin_number": "14",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 798,
        "pin_name": "P2.04",
        "pin_number": "15",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 798,
        "pin_name": "P2.05",
        "pin_number": "16",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin. TRACE requires extra-high-drive E0/E1 PIN_CNF DRIVE configuration.",
        "page": 798,
        "pin_name": "P2.06/TRACECLK",
        "pin_number": "17",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 798,
        "pin_name": "P2.07/TRACEDATA0/SWO",
        "pin_number": "18",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 798,
        "pin_name": "P2.08/TRACEDATA1",
        "pin_number": "19",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "P2.09/TRACEDATA2",
        "pin_number": "20",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "P2.10/TRACEDATA3",
        "pin_number": "21",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "VDD",
        "pin_number": "22",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "P0.00",
        "pin_number": "23",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "P0.01",
        "pin_number": "24",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "SWDIO",
        "pin_number": "25",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "SWDCLK",
        "pin_number": "26",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "P0.02",
        "pin_number": "27",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin. Dedicated GRTC PWMOUT.",
        "page": 799,
        "pin_name": "P0.03/GRTCPWM",
        "pin_number": "28",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin. Dedicated GRTC CLKOUT32K.",
        "page": 799,
        "pin_name": "P0.04/GRTC_CLKOUT32K",
        "pin_number": "29",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "nRESET",
        "pin_number": "30",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "See Reference circuitry on page 808 for RF layout guidelines.",
        "page": 799,
        "pin_name": "ANT",
        "pin_number": "31",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "VSS_PA",
        "pin_number": "32",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Must short to DECA (pin 43).",
        "page": 799,
        "pin_name": "DECRF",
        "pin_number": "33",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "XC1",
        "pin_number": "34",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "XC2",
        "pin_number": "35",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 799,
        "pin_name": "VDD",
        "pin_number": "36",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 800,
        "pin_name": "P1.09/TAMPC",
        "pin_number": "37",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 800,
        "pin_name": "P1.10/TAMPC",
        "pin_number": "38",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin.",
        "page": 800,
        "pin_name": "P1.11/AIN4",
        "pin_number": "39",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Clock pin.",
        "page": 800,
        "pin_name": "P1.12/AIN5",
        "pin_number": "40",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "P1.13/AIN6",
        "pin_number": "41",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "P1.14/AIN7",
        "pin_number": "42",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Must short to DECRF (pin 33).",
        "page": 801,
        "pin_name": "DECA",
        "pin_number": "43",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "VSS",
        "pin_number": "44",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "DECD",
        "pin_number": "45",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "DCC",
        "pin_number": "46",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "VDD",
        "pin_number": "47",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "page": 801,
        "pin_name": "VDD",
        "pin_number": "48",
        "table_caption": "Table 73: QFN48 pin assignments"
      },
      {
        "confidence": "high",
        "notes": "Datasheet explicitly states: 'For the device to function properly, exposed die pad (pin 49) must be connected to ground (VSS, pins 32 and 44).'",
        "page": 801,
        "pin_name": "VSS",
        "pin_number": "49",
        "table_caption": "Table 73: QFN48 pin assignments"
      }
    ]
  },
  "tooling": {
    "claude_model": "claude-opus-4-7",
    "extracted_at": "2026-06-20T02:02:45Z",
    "extractor": "ds2sf",
    "extractor_version": "0.8.1",
    "service_kicad_baseline_match": false,
    "service_kicad_used": true
  }
}