main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs xt26g02dwsiga: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers xt26g02dwsiga: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/xt26g02dwsiga · Ray 4d ago
xt26g02dwsiga-etched.fit.json xt26g02dwsiga: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
xt26g02dwsiga-etched.glb xt26g02dwsiga: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
xt26g02dwsiga-etched.step xt26g02dwsiga: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
xt26g02dwsiga.glb Publish 0.1.0 · Ray 4d ago
xt26g02dwsiga.kicad_mod Publish 0.1.0 · Ray 4d ago
xt26g02dwsiga.kicad_sym Publish 0.1.0 · Ray 4d ago
xt26g02dwsiga.lbr Publish 0.1.0 · Ray 4d ago
xt26g02dwsiga.step Publish 0.1.0 · Ray 4d ago

XT26G02DWSIGA

XTX · NAND FLASH · WSON-8-EP(6x8)

XT26G02DWSIGA from XTX, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input; active low enables device operation, high level disables device and places outputs in high impedance.
2 SO (SIO1) bidirectional Serial data output (standard SPI) / bidirectional SIO1 (Dual/Quad SPI); data shifts out on CLK falling edge.
3 WP# (SIO2) bidirectional Write Protect input (internally pulled to VCC) that prevents block lock bit changes when driven low with BRWD bit set; becomes bidirectional SIO2 in Quad mode.
4 VSS power_in Ground connection (0V reference).
5 SI (SIO0) bidirectional Serial data input (standard SPI) / bidirectional SIO0 (Dual/Quad SPI); data latched on CLK rising edge.
6 CLK input Serial Clock Input (maximum 120 MHz) synchronizing the SPI interface; data input latched on rising edge, output valid after falling edge.
7 SIO3 bidirectional Bidirectional data line 3 for Quad SPI mode; must be kept high in Standard and Dual SPI modes when not in active input/output state.
8 VCC power_in Power supply with operating voltage range 2.7V to 3.6V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer XTX
Package WSON-8-EP(6x8)
Category Memory
Pins 9

CAD (KiCad official)

  • Symbol: XT26G02DWSIGA
  • Footprint: Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm
  • 3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: xt26g02dwsiga-etched.step / xt26g02dwsiga-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xt26g02dwsiga.step / xt26g02dwsiga.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XTX datasheet (62 pp, sha256 37d42f1d58f2cd6f, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF