component
XT26G02DWSIGA
Public Made by Adomby adom
XTX NAND FLASH, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# XT26G02DWSIGA++**XTX** · NAND FLASH · WSON-8-EP(6x8)++XT26G02DWSIGA from XTX, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS# | input | Chip Select input; active low enables device operation, high level disables device and places outputs in high impedance. |+| 2 | SO (SIO1) | bidirectional | Serial data output (standard SPI) / bidirectional SIO1 (Dual/Quad SPI); data shifts out on CLK falling edge. |+| 3 | WP# (SIO2) | bidirectional | Write Protect input (internally pulled to VCC) that prevents block lock bit changes when driven low with BRWD bit set; becomes bidirectional SIO2 in Quad mode. |+| 4 | VSS | power_in | Ground connection (0V reference). |+| 5 | SI (SIO0) | bidirectional | Serial data input (standard SPI) / bidirectional SIO0 (Dual/Quad SPI); data latched on CLK rising edge. |+| 6 | CLK | input | Serial Clock Input (maximum 120 MHz) synchronizing the SPI interface; data input latched on rising edge, output valid after falling edge. |+| 7 | SIO3 | bidirectional | Bidirectional data line 3 for Quad SPI mode; must be kept high in Standard and Dual SPI modes when not in active input/output state. |+| 8 | VCC | power_in | Power supply with operating voltage range 2.7V to 3.6V. |+| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XTX |+| Package | WSON-8-EP(6x8) |+| Category | Memory |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `XT26G02DWSIGA`+- Footprint: `Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm`+- 3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `xt26g02dwsiga-etched.step` / `xt26g02dwsiga-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xt26g02dwsiga.step` / `xt26g02dwsiga.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XTX datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010599240814592) (62 pp, sha256 `37d42f1d58f2cd6f`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/xt26g02dwsiga-datasheet.pdf)
page.jsonadded+159@@ -0,0 +1,159 @@+{+ "slug": "xt26g02dwsiga",+ "version": "0.1.0",+ "type": "component",+ "description": "XTX NAND FLASH, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "memory",+ "xt26g02dwsiga",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "xt26g02dwsiga.kicad_sym",+ "xt26g02dwsiga.kicad_mod",+ "xt26g02dwsiga.glb",+ "xt26g02dwsiga.step",+ "xt26g02dwsiga.lbr",+ "docs/hero.png",+ "docs/xt26g02dwsiga-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "XT26G02DWSIGA",+ "manufacturer": "XTX",+ "package": "WSON-8-EP(6x8)",+ "pin_count": 9,+ "category": "Memory",+ "subcategory": "NAND FLASH",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010599240814592",+ "parts": {+ "symbol": "xt26g02dwsiga.kicad_sym",+ "footprint": "xt26g02dwsiga.kicad_mod",+ "model_3d": "xt26g02dwsiga-etched.glb",+ "model_3d_plain": "xt26g02dwsiga.glb",+ "model_3d_step": "xt26g02dwsiga-etched.step",+ "model_3d_step_plain": "xt26g02dwsiga.step",+ "lbr": "xt26g02dwsiga.lbr"+ },+ "distributor_links": {+ "lcsc": "C22751534"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T17:24:51Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CS#",+ "type": "input",+ "description": "Chip Select input; active low enables device operation, high level disables device and places outputs in high impedance."+ },+ {+ "number": "2",+ "name": "SO (SIO1)",+ "type": "bidirectional",+ "description": "Serial data output (standard SPI) / bidirectional SIO1 (Dual/Quad SPI); data shifts out on CLK falling edge."+ },+ {+ "number": "3",+ "name": "WP# (SIO2)",+ "type": "bidirectional",+ "description": "Write Protect input (internally pulled to VCC) that prevents block lock bit changes when driven low with BRWD bit set; becomes bidirectional SIO2 in Quad mode."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground connection (0V reference)."+ },+ {+ "number": "5",+ "name": "SI (SIO0)",+ "type": "bidirectional",+ "description": "Serial data input (standard SPI) / bidirectional SIO0 (Dual/Quad SPI); data latched on CLK rising edge."+ },+ {+ "number": "6",+ "name": "CLK",+ "type": "input",+ "description": "Serial Clock Input (maximum 120 MHz) synchronizing the SPI interface; data input latched on rising edge, output valid after falling edge."+ },+ {+ "number": "7",+ "name": "SIO3",+ "type": "bidirectional",+ "description": "Bidirectional data line 3 for Quad SPI mode; must be kept high in Standard and Dual SPI modes when not in active input/output state."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply with operating voltage range 2.7V to 3.6V."+ },+ {+ "number": "9",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 62,+ "cost_usd": 0.2808,+ "at": "2026-10-01T17:24:29"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010599240814592",+ "pages": 62,+ "sha256": "37d42f1d58f2cd6f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}