XL7135CD

{
  "slug": "xl7135cd",
  "version": "0.1.0",
  "type": "component",
  "description": "XINLUDA Analog To Digital Converters (ADCs), SOP-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data converters",
    "xl7135cd",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
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    "xl7135cd.glb",
    "xl7135cd.step",
    "xl7135cd.lbr",
    "docs/hero.png",
    "docs/xl7135cd-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
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  "component": {
    "mpn": "XL7135CD",
    "manufacturer": "XINLUDA",
    "package": "SOP-28-300mil",
    "pin_count": 28,
    "category": "Data Converters",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/46be9ef1c41ef6a4a7899853825e812e.pdf",
    "parts": {
      "symbol": "xl7135cd.kicad_sym",
      "footprint": "xl7135cd.kicad_mod",
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      "model_3d_plain": "xl7135cd-etched.glb",
      "model_3d_step": "xl7135cd-etched.step",
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      "lbr": "xl7135cd.lbr"
    },
    "distributor_links": {
      "lcsc": "C513493"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T21:16:26Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC-",
        "type": "power_in",
        "description": "Negative supply, recommended -3 V to -8 V (nominal -5 V) with respect to ground, absolute maximum 15 V total between VCC+ and VCC-."
      },
      {
        "number": "2",
        "name": "REF",
        "type": "input",
        "description": "Reference voltage input, positive with respect to analog common, recommended 1 V and within VCC- to VCC+."
      },
      {
        "number": "3",
        "name": "ANLG COMMON",
        "type": "passive",
        "description": "Analog common, connected internally to IN- during auto-zero, deintegrate and zero-integrator phases; tie to the same point as IN- when IN- is at a fixed voltage."
      },
      {
        "number": "4",
        "name": "INT OUT",
        "type": "output",
        "description": "Integrator output to which the integrating capacitor CINT connects (nominal 0.47 uF), keeping the swing at least 0.3 V from either supply."
      },
      {
        "number": "5",
        "name": "AUTO ZERO",
        "type": "passive",
        "description": "Auto-zero capacitor CAZ connection (typical value 1 uF) used to compensate offsets of the buffer, integrator and comparator."
      },
      {
        "number": "6",
        "name": "BUFF OUT",
        "type": "output",
        "description": "Buffer amplifier output that connects to the integrating resistor RINT, sized for an integrator current of nominally 20 uA."
      },
      {
        "number": "7",
        "name": "Cref-",
        "type": "passive",
        "description": "Negative terminal of the external reference capacitor Cref (typical value 1 uF)."
      },
      {
        "number": "8",
        "name": "Cref+",
        "type": "passive",
        "description": "Positive terminal of the external reference capacitor Cref (typical value 1 uF)."
      },
      {
        "number": "9",
        "name": "IN-",
        "type": "input",
        "description": "Differential analog input low; voltage range VCC- to VCC+, can be tied to ANLG COMMON, input leakage typically 1 pA."
      },
      {
        "number": "10",
        "name": "IN+",
        "type": "input",
        "description": "Differential analog input high; voltage range VCC- to VCC+, input leakage typically 1 pA."
      },
      {
        "number": "11",
        "name": "VCC+",
        "type": "power_in",
        "description": "Positive supply, recommended 4 V to 6 V (nominal 5 V), supply current 1 mA typical at fclock = 0."
      },
      {
        "number": "12",
        "name": "D5",
        "type": "output",
        "description": "Digit-drive output for the most significant digit, goes high for 200 clock pulses in sequence, VOH min 2.4 V at -1 mA."
      },
      {
        "number": "13",
        "name": "B1",
        "type": "output",
        "description": "Multiplexed BCD output bit 1 (weight 1), VOH min 2.4 V at -1 mA."
      },
      {
        "number": "14",
        "name": "B2",
        "type": "output",
        "description": "Multiplexed BCD output bit 2 (weight 2), VOH min 2.4 V at -1 mA."
      },
      {
        "number": "15",
        "name": "B4",
        "type": "output",
        "description": "Multiplexed BCD output bit 4 (weight 4), VOH min 2.4 V at -1 mA."
      },
      {
        "number": "16",
        "name": "B8",
        "type": "output",
        "description": "Multiplexed BCD output bit 8 (weight 8), VOH min 2.4 V at -1 mA."
      },
      {
        "number": "17",
        "name": "D4",
        "type": "output",
        "description": "Digit-drive output for digit 4, goes high for 200 clock pulses in sequence, VOH min 2.4 V at -1 mA."
      },
      {
        "number": "18",
        "name": "D3",
        "type": "output",
        "description": "Digit-drive output for digit 3, goes high for 200 clock pulses in sequence, VOH min 2.4 V at -1 mA."
      },
      {
        "number": "19",
        "name": "D2",
        "type": "output",
        "description": "Digit-drive output for digit 2, goes high for 200 clock pulses in sequence, VOH min 2.4 V at -1 mA."
      },
      {
        "number": "20",
        "name": "D1",
        "type": "output",
        "description": "Digit-drive output for the least significant digit, goes high for 200 clock pulses in sequence, VOH min 2.4 V at -1 mA."
      },
      {
        "number": "21",
        "name": "BUSY",
        "type": "output",
        "description": "Goes high at the start of signal integrate and stays high until the first clock after zero crossing (or end of cycle on over-range)."
      },
      {
        "number": "22",
        "name": "CLK",
        "type": "input",
        "description": "Clock input, VIH min 2.8 V, VIL max 0.8 V, operating frequency up to 2 MHz max (120 kHz typical test condition)."
      },
      {
        "number": "23",
        "name": "POLARITY",
        "type": "output",
        "description": "Polarity output, high for a positive input signal, updated at the start of each deintegrate phase and valid for all inputs."
      },
      {
        "number": "24",
        "name": "DGTL GND",
        "type": "power_in",
        "description": "Digital ground; return currents from digital circuits must not be sent to the analog ground line."
      },
      {
        "number": "25",
        "name": "RUN/HOLD",
        "type": "input",
        "description": "High or open gives continuous conversions every 40,002 clock pulses; low holds the reading after the current cycle, and a positive pulse over 300 ns starts a new cycle (VIH min 2.8 V, VIL max 0.8 V)."
      },
      {
        "number": "26",
        "name": "STROBE",
        "type": "output",
        "description": "Active-low strobe pulse of 1/2 clock width at the midpoint of each digit drive, used to latch BCD data into external latches, UARTs or microprocessors."
      },
      {
        "number": "27",
        "name": "OVER RANGE",
        "type": "output",
        "description": "Goes high after BUSY goes low at the end of a cycle when an over-range occurs, and goes low at the start of the next deintegrate phase."
      },
      {
        "number": "28",
        "name": "UNDER RANGE",
        "type": "output",
        "description": "Goes high at the end of BUSY when the result is at or below 9% of full scale (count of 1800), low at the next signal integrate phase."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet lists the XL7135CD as SOP28 (18.25x7.50 mm) but the pinout figure is a single generic ; Pin types for ANLG COMMON, AUTO ZERO, Cref- and Cref+ are set to passive and are my judgment. The da; Page 9 calls RUN/HOLD and STROBE 'Input' in some headings. STROBE is a negative-going output pulse a",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 12,
        "cost_usd": 0.4372,
        "at": "2026-10-22T21:16:05"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/46be9ef1c41ef6a4a7899853825e812e.pdf",
        "pages": 12,
        "sha256": "2d6fffa5a1025a21",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 28,
        "described": 28,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
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        "zmin_mm": 0.0,
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        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xl7135cd-etched.step",
        "role": "eda",
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        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}