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XL7026E1
Public Made by Adomby adom
XLSEMI DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+49@@ -0,0 +1,49 @@+# XL7026E1++**XLSEMI** · DC-DC Converters · SOP-8-EP++XL7026E1 from XLSEMI, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FB | input | Feedback pin. Sensed against the internal 1.25 V reference through an external resistor divider from VOUT to set the output voltage (VOUT = 1.25 * (1 + R2/R1)). |+| 2 | VREG | power_in | Chip supply pin. Requires a 10 µF decoupling capacitor between VREG and GND to filter noise. An external 7-9 V bias can be applied to this pin to reduce internal power dissipation. |+| 3 | VC | passive | Internal voltage-regulator bypass pin. Requires a 1 µF ceramic capacitor connected between VC and VIN. |+| 4 | VIN | power_in | Main power input, DC 12-90 V (demo tested up to 84 V). Bypass to GND with an electrolytic capacitor placed close to the pin to suppress switching noise and inrush spikes. |+| 5 | SW | power_out | Power-switch output pin. Connects to the external inductor and freewheeling Schottky diode of the buck converter. Tied together with pin 6 for current handling. |+| 6 | SW | power_out | Power-switch output pin (paralleled with pin 5). Connects to the switching node of the buck converter. |+| 7 | OGND | power_in | Power/output ground return for the internal power stage. Tie to the ground plane at the input capacitor return. |+| 8 | GND | power_in | Signal ground reference for the control circuitry. |+| 9 | EP | power_in | Exposed thermal pad on the bottom of the SOP8-EP package. Solder to the ground copper pour for heat sinking; connect to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XLSEMI |+| Package | SOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `XL7026E1E1`++## CAD (KiCad official)++- Symbol: `XL7026E1`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XLSEMI datasheet](docs/xl7026e1-datasheet.pdf) (8 pp, sha256 `56a8aedb64fd6229`, retrieved 2026-08-17, tier: manufacturer)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/xl7026e1-datasheet.pdf)
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