XL5615

{
  "slug": "xl5615",
  "version": "0.1.0",
  "type": "component",
  "description": "XINLUDA Digital To Analog Converters (DAC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "xl5615",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "xl5615.kicad_sym",
    "xl5615.kicad_mod",
    "xl5615.glb",
    "xl5615.step",
    "xl5615.lbr",
    "docs/hero.png",
    "docs/xl5615-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "xl5615-hero.glb",
    "xl5615-hero.overlay.json",
    "xl5615-etched.glb"
  ],
  "component": {
    "mpn": "XL5615",
    "manufacturer": "XINLUDA",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950636885262336",
    "parts": {
      "symbol": "xl5615.kicad_sym",
      "footprint": "xl5615.kicad_mod",
      "model_3d": "xl5615-hero.glb",
      "model_3d_plain": "xl5615-etched.glb",
      "model_3d_step": "xl5615-etched.step",
      "model_3d_step_plain": "xl5615.step",
      "lbr": "xl5615.lbr"
    },
    "distributor_links": {
      "lcsc": "C968675"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T00:45:48Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input; the digital inputs use Schmitt triggers, with VIH at least 2.4 V and VIL at most 0.8 V."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input, which should be held low while CS is high to minimize clock feedthrough."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Chip select input, active low, with CS-high setup and hold times to SCLK specified in the timing table."
      },
      {
        "number": "4",
        "name": "DOUT",
        "type": "output",
        "description": "Serial data output for daisy chaining, with VOH at least VDD-1 V at IO = -2 mA and VOL at most 0.4 V at IO = 2 mA."
      },
      {
        "number": "5",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for the DAC."
      },
      {
        "number": "6",
        "name": "REFIN",
        "type": "input",
        "description": "Buffered high-impedance reference input; Vref is specified from 2 V minimum to VDD-2 V maximum (2.048 V nominal)."
      },
      {
        "number": "7",
        "name": "OUT",
        "type": "output",
        "description": "DAC analog voltage output, with a range of 0 V to VDD-0.4 V at RL = 10 kΩ."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive power supply, 4.5 V minimum, 5 V nominal, 5.5 V maximum."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and names are taken from the Section 4 terminal table on page 2, which does not name the; Pin 6 REFIN range is taken from the page 3 recommended operating conditions. Pin 6 and pin 5/8 type ; The page 9 SOP8 drawing shows PIN1 only; it does not print numbers for the other pins, so pins 2 thr"
        ],
        "pages_sent": 10,
        "cost_usd": 0.04,
        "at": "2026-10-19T00:42:52"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950636885262336",
        "pages": 10,
        "sha256": "7a9d2ee1c65d2060",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "xl5615.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xl5615-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9b947b64153c88b31ce93507446e82fed7af20ca423cd43d889978c087bfeb58",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}