component
XL549
Public Made by Adomby adom
XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
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"data acquisition",
"xl549",
"factory-2.0.0",
"extractor-text"
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"dependencies": {},
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"path": "docs/hero.png"
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"files": [
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"docs/hero.png",
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"xl549-hero.overlay.json",
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"component": {
"mpn": "XL549",
"manufacturer": "XINLUDA",
"package": "SOP-8",
"pin_count": 8,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886318533791744",
"parts": {
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"footprint": "xl549.kicad_mod",
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"model_3d_step_plain": "xl549.step",
"lbr": "xl549.lbr"
},
"distributor_links": {
"lcsc": "C707062"
},
"distributor_check": {
"checked_at": "2026-10-18T23:37:33Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "REF+",
"type": "input",
"description": "Positive reference voltage input, which must be kept within 2.5 V ≤ REF+ ≤ Vcc + 0.1 as printed."
},
{
"number": "2",
"name": "ANALOG IN",
"type": "input",
"description": "Analog signal input sampled by the on-chip sample-and-hold, which starts sampling at the falling edge of the 4th I/O CLOCK and takes 4 I/O clock cycles for channel acquisition."
},
{
"number": "3",
"name": "REF-",
"type": "input",
"description": "Negative reference voltage input, which must be kept within -0.1 V ≤ REF- ≤ 2.5 V."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device; the datasheet gives no further limits for this pin."
},
{
"number": "5",
"name": "CS",
"type": "input",
"description": "Chip select input, which must be taken low to start a conversion sequence and must be high (or I/O CLOCK held low for 36 internal clock cycles) to complete the conversion."
},
{
"number": "6",
"name": "DATA OUT",
"type": "output",
"description": "Serial conversion result output, which first presents the MSB (D7) on CS falling edge and then updates on I/O CLOCK falling edges, with output data remaining valid for at least 10 ns after I/O CLOCK falls."
},
{
"number": "7",
"name": "I/O CLOCK",
"type": "input",
"description": "External clock input that drives the serial conversion timing; the on-chip 4 MHz system clock runs independently of it."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage input with an operating range of 3 V to 6.5 V per the features list and a 6.5 V absolute maximum."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: CS, DATA OUT and I/O CLOCK types (input/output) are inferred from the pin function table and timing ; The datasheet's electrical table lists VCC as 3 V min, 5 V typ, 6 V max, while the features list and; The pin table is a single table shared by XL549 (SOP8) and XD549 (DIP8) with no per-package pin draw"
],
"pages_sent": 6,
"cost_usd": 0.0325,
"at": "2026-10-18T23:35:02"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886318533791744",
"pages": 6,
"sha256": "d69dd73a48dd13c1",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"models_3d": [
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