component
XJNG2102
Public Made by Adomby adom
Wuxi NCE Power Semiconductor Isolators - Gate Drivers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
xjng2102: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
26c85c7
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{
"schema_version": 1,
"type": "component",
"slug": "xjng2102",
"title": "XJNG2102",
"brief": "Wuxi NCE Power Semiconductor Isolators - Gate Drivers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"xjng2102"
],
"component": {
"mpn": "XJNG2102",
"manufacturer": "Wuxi NCE Power Semiconductor",
"package": "SOIC-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "Isolators - Gate Drivers",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2209301830_Wuxi-NCE-Power-Semiconductor-XJNG2102_C2940736.pdf",
"parts": {
"symbol": "xjng2102.kicad_sym",
"footprint": "xjng2102.kicad_mod",
"model_3d": "xjng2102-etched.glb",
"model_3d_plain": "xjng2102.glb",
"model_3d_step": "xjng2102-etched.step",
"model_3d_step_plain": "xjng2102.step",
"lbr": "xjng2102.lbr"
},
"distributor_links": {
"lcsc": "C2940736"
},
"pins": [
{
"number": "1",
"name": "VCC",
"type": "power_in",
"description": "Low side and main power supply. Recommended 6 V to 20 V (abs max 25 V) referenced to COM. Provides the low-side gate-drive rail and powers the internal logic."
},
{
"number": "2",
"name": "HIN",
"type": "input",
"description": "Logic input for high-side gate driver output (HO). CMOS/LSTTL compatible down to 3.3 V logic; VIH >= 2.5 V, VIL <= 0.8 V. HO is in phase with HIN."
},
{
"number": "3",
"name": "LIN",
"type": "input",
"description": "Logic input for low-side gate driver output (LO). CMOS/LSTTL compatible down to 3.3 V logic; VIH >= 2.5 V, VIL <= 0.8 V. LO is out of phase with LIN (inverting)."
},
{
"number": "4",
"name": "COM",
"type": "power_in",
"description": "Device ground / low-side return. All absolute voltage parameters are referenced to COM."
},
{
"number": "5",
"name": "LO",
"type": "output",
"description": "Low-side gate drive output. Swings between COM and VCC with typical 1 A source / 1 A sink pulsed capability; drives the gate of the low-side N-channel power MOSFET."
},
{
"number": "6",
"name": "VS",
"type": "power_in",
"description": "High-side floating supply return / bootstrap return. Connects to the source of the high-side MOSFET and the negative terminal of the bootstrap capacitor. Rated -6 V to +200 V (abs max VB-25 to VB+0.3), dV/dt tolerance up to 50 V/ns."
},
{
"number": "7",
"name": "HO",
"type": "output",
"description": "High-side gate drive output, in phase with HIN. Swings between VS and VB with typical 1 A source / 1 A sink pulsed capability; drives the gate of the high-side N-channel power MOSFET."
},
{
"number": "8",
"name": "VB",
"type": "power_in",
"description": "High-side floating supply (bootstrap supply positive rail). Recommended VS+6 V to VS+20 V (abs max 225 V to COM). Connects to the positive terminal of the bootstrap capacitor and cathode of the bootstrap diode."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2209301830_Wuxi-NCE-Power-Semiconductor-XJNG2102_C2940736.pdf",
"pages": 6,
"sha256": "e3ae5b7b069d531a",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "xjng2102.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "xjng2102-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "85685379c919f09478f4218af9a9ebeb341efc9c798d01cee795a753407a7f78",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Wuxi NCE Power Semiconductor",
"Package": "SOIC-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"xjng2102"
],
"discovery_pitch": "XJNG2102 (Wuxi NCE Power Semiconductor) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"xjng2102.kicad_sym",
"xjng2102.kicad_mod",
"xjng2102.glb",
"xjng2102.step",
"xjng2102.lbr",
"docs/hero.png",
"docs/xjng2102-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"xjng2102-etched.step"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "XJNG2102",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T14:26:28.480Z"
}