XJNG2102

{
 "schema": "adom.pads/1",
 "slug": "xjng2102",
 "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
 },
 "pad_count": 8,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "VCC",
   "type": "power_in",
   "description": "Low side and main power supply. Recommended 6 V to 20 V (abs max 25 V) referenced to COM. Provides the low-side gate-drive rail and powers the internal logic.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "HIN",
   "type": "input",
   "description": "Logic input for high-side gate driver output (HO). CMOS/LSTTL compatible down to 3.3 V logic; VIH >= 2.5 V, VIL <= 0.8 V. HO is in phase with HIN.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "LIN",
   "type": "input",
   "description": "Logic input for low-side gate driver output (LO). CMOS/LSTTL compatible down to 3.3 V logic; VIH >= 2.5 V, VIL <= 0.8 V. LO is out of phase with LIN (inverting).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "COM",
   "type": "power_in",
   "description": "Device ground / low-side return. All absolute voltage parameters are referenced to COM.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "LO",
   "type": "output",
   "description": "Low-side gate drive output. Swings between COM and VCC with typical 1 A source / 1 A sink pulsed capability; drives the gate of the low-side N-channel power MOSFET.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "VS",
   "type": "power_in",
   "description": "High-side floating supply return / bootstrap return. Connects to the source of the high-side MOSFET and the negative terminal of the bootstrap capacitor. Rated -6 V to +200 V (abs max VB-25 to VB+0.3), dV/dt tolerance up to 50 V/ns.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "HO",
   "type": "output",
   "description": "High-side gate drive output, in phase with HIN. Swings between VS and VB with typical 1 A source / 1 A sink pulsed capability; drives the gate of the high-side N-channel power MOSFET.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "VB",
   "type": "power_in",
   "description": "High-side floating supply (bootstrap supply positive rail). Recommended VS+6 V to VS+20 V (abs max 225 V to COM). Connects to the positive terminal of the bootstrap capacitor and cathode of the bootstrap diode.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}