component
XD7660
Public Made by Adomby adom
XINLUDA Charge Pumps, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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XD7660
XINLUDA · Charge Pumps · DIP-8
XD7660 from XINLUDA, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST | input | Connecting this pin to V+ raises the oscillator frequency by about 3.5 times, which lowers output impedance and ripple; leaving it open gives the nominal oscillator frequency. |
| 2 | CAP+ | passive | The positive terminal of pump capacitor C1 must be connected to this pin, which is the common charge pump driver node. |
| 3 | GND | power_in | Ground reference; the output (pin 5) must not go more positive than GND, or the device will latch up. |
| 4 | CAP- | passive | Negative side of the pump; the output (pin 5) must not go more positive than this pin, otherwise an external Schottky diode from VOUT to CAP- is needed to prevent latch-up. |
| 5 | VOUT | power_out | Negative converter output, VOUT = -n*VIN; with V+ at or below 5.5V a short to V+ is continuous-rated, while above 5.5V it may only be shorted transiently. |
| 6 | LV | input | Tie to GND for supplies below 3.5V to bypass the internal regulator; leave floating for supplies from 3.5V to 10V to prevent latch-up, and do not connect to GND above 3.5V. |
| 7 | OSC | input | Oscillator terminal: an external capacitor lowers the nominal 10kHz frequency, or an external clock may overdrive it through a 1kΩ series resistor. |
| 8 | V+ | power_in | Positive supply input with a 2V to 10V operating range and a 10.5V absolute maximum; a 2.2µF capacitor to ground may be required for sources with high impedance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply current (V+=5V, no load, Pin 1 open) | I+ | 40 | 80 | µA | RL =∞( No load, Pin1 Open), +25°C | 3 | |
| Supply current over temperature (V+=5V) | I+ | 180 | µA | RL =∞( No load, Open), -40°C < TA < +85°C | 3 | ||
| Supply voltage range - high | V+H | 3 | 10 | V | RL = 10k, LV Open, TMIN < TA < TMAX | 3 | |
| Supply voltage range - low | V+L | 2 | 3.5 | V | RL = 10k, LV to GND, TMIN < TA < TMAX | 3 | |
| Output source resistance | ROUT | 55 | 100 | Ω | IOUT = 20mA | 3 | |
| Output source resistance over temperature | ROUT | 150 | Ω | IOUT = 20mA, -40°C < TA < +85°C | 3 | ||
| Output source resistance at low supply | ROUT | 300 | Ω | IOUT = 3mA, V+ = 2V, LV = GND, -40°C < TA < +85°C | 3 | ||
| Power efficiency | PEFF | 96 | 98 | % | RL = 5kΩ | 3 | |
| Power efficiency over temperature | PEFF | 95 | 97 | % | TMIN < TA < TMAX, RL = 5kΩ | 3 | |
| Voltage conversion efficiency | VOUTEFF | 97 | 99 | % | RL =∞( No load, Open), +25°C | 3 | |
| Supply current (V+=3V, no load, Pin 1 open) | I+ | 16 | 50 | µA | V+ = 3V, LV = GND; RL = ∞(No load, Pin 1 Open) | 4 | |
| Supply current over temperature (V+=3V) | I+ | 125 | µA | V+ = 3V, LV = GND; -40°C < TA < +85°C | 4 | ||
| Output source resistance (V+=3V) | ROUT | 97 | 150 | Ω | V+ = 3V, IOUT = 10mA | 4 | |
| Output source resistance over temperature (V+=3V) | ROUT | 200 | Ω | V+ = 3V, -40°C < TA < +85°C | 4 | ||
| Supply voltage (LV input) absolute range | Lv | -0.3 | V | V+ < 5.5V; maximum printed as V+ + 0.3 (not a numeric limit) | 3 | ||
| Supply voltage (V+ pin) | VCC | 10.5 | V | Supply voltage range (V+ pin) | 3 | ||
| Current into Lv | ILV | 25 | μA | V+ > 3.5V | 3 | ||
| Storage temperature range | T | -65 | 150 | ℃ | Storage temperature range | 3 | |
| Thermal resistance junction-to-ambient (DIP-8) | θJA | 115 | °C/W | XD7660 (DIP-8); Note 2: component mounted on evaluation PC board in free air | 3 | ||
| Operating ambient temperature range | Tamb | -40 | 85 | ℃ | Operating | 3 |
CAD (KiCad official)
- Symbol:
XD7660 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
xd7660-etched.step/xd7660-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xd7660.step/xd7660.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (17 pp, sha256
8bc16e7a37ab8cfc, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# XD7660
**XINLUDA** · Charge Pumps · DIP-8
XD7660 from XINLUDA, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST | input | Connecting this pin to V+ raises the oscillator frequency by about 3.5 times, which lowers output impedance and ripple; leaving it open gives the nominal oscillator frequency. |
| 2 | CAP+ | passive | The positive terminal of pump capacitor C1 must be connected to this pin, which is the common charge pump driver node. |
| 3 | GND | power_in | Ground reference; the output (pin 5) must not go more positive than GND, or the device will latch up. |
| 4 | CAP- | passive | Negative side of the pump; the output (pin 5) must not go more positive than this pin, otherwise an external Schottky diode from VOUT to CAP- is needed to prevent latch-up. |
| 5 | VOUT | power_out | Negative converter output, VOUT = -n*VIN; with V+ at or below 5.5V a short to V+ is continuous-rated, while above 5.5V it may only be shorted transiently. |
| 6 | LV | input | Tie to GND for supplies below 3.5V to bypass the internal regulator; leave floating for supplies from 3.5V to 10V to prevent latch-up, and do not connect to GND above 3.5V. |
| 7 | OSC | input | Oscillator terminal: an external capacitor lowers the nominal 10kHz frequency, or an external clock may overdrive it through a 1kΩ series resistor. |
| 8 | V+ | power_in | Positive supply input with a 2V to 10V operating range and a 10.5V absolute maximum; a 2.2µF capacitor to ground may be required for sources with high impedance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply current (V+=5V, no load, Pin 1 open) | I+ | | 40 | 80 | µA | RL =∞( No load, Pin1 Open), +25°C | 3 |
| Supply current over temperature (V+=5V) | I+ | | | 180 | µA | RL =∞( No load, Open), -40°C < TA < +85°C | 3 |
| Supply voltage range - high | V+H | 3 | | 10 | V | RL = 10k, LV Open, TMIN < TA < TMAX | 3 |
| Supply voltage range - low | V+L | 2 | | 3.5 | V | RL = 10k, LV to GND, TMIN < TA < TMAX | 3 |
| Output source resistance | ROUT | | 55 | 100 | Ω | IOUT = 20mA | 3 |
| Output source resistance over temperature | ROUT | | | 150 | Ω | IOUT = 20mA, -40°C < TA < +85°C | 3 |
| Output source resistance at low supply | ROUT | | | 300 | Ω | IOUT = 3mA, V+ = 2V, LV = GND, -40°C < TA < +85°C | 3 |
| Power efficiency | PEFF | 96 | 98 | | % | RL = 5kΩ | 3 |
| Power efficiency over temperature | PEFF | 95 | 97 | | % | TMIN < TA < TMAX, RL = 5kΩ | 3 |
| Voltage conversion efficiency | VOUTEFF | 97 | 99 | | % | RL =∞( No load, Open), +25°C | 3 |
| Supply current (V+=3V, no load, Pin 1 open) | I+ | | 16 | 50 | µA | V+ = 3V, LV = GND; RL = ∞(No load, Pin 1 Open) | 4 |
| Supply current over temperature (V+=3V) | I+ | | | 125 | µA | V+ = 3V, LV = GND; -40°C < TA < +85°C | 4 |
| Output source resistance (V+=3V) | ROUT | | 97 | 150 | Ω | V+ = 3V, IOUT = 10mA | 4 |
| Output source resistance over temperature (V+=3V) | ROUT | | | 200 | Ω | V+ = 3V, -40°C < TA < +85°C | 4 |
| Supply voltage (LV input) absolute range | Lv | -0.3 | | | V | V+ < 5.5V; maximum printed as V+ + 0.3 (not a numeric limit) | 3 |
| Supply voltage (V+ pin) | VCC | | | 10.5 | V | Supply voltage range (V+ pin) | 3 |
| Current into Lv | ILV | | | 25 | μA | V+ > 3.5V | 3 |
| Storage temperature range | T | -65 | | 150 | ℃ | Storage temperature range | 3 |
| Thermal resistance junction-to-ambient (DIP-8) | θJA | | | 115 | °C/W | XD7660 (DIP-8); Note 2: component mounted on evaluation PC board in free air | 3 |
| Operating ambient temperature range | Tamb | -40 | | 85 | ℃ | Operating | 3 |
## CAD (KiCad official)
- Symbol: `XD7660`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `xd7660-etched.step` / `xd7660-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xd7660.step` / `xd7660.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [XINLUDA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756487488926306304) (17 pp, sha256 `8bc16e7a37ab8cfc`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/xd7660-datasheet.pdf)