XD74LS181

{
  "schema_version": 1,
  "type": "component",
  "slug": "xd74ls181",
  "title": "XD74LS181",
  "brief": "XINLUDA Specialty Logic, DIP-24. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "xd74ls181"
  ],
  "component": {
    "mpn": "XD74LS181",
    "manufacturer": "XINLUDA",
    "package": "DIP-24",
    "pin_count": 24,
    "category": "Logic",
    "subcategory": "Specialty Logic",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588896624320131072",
    "parts": {
      "symbol": "xd74ls181.kicad_sym",
      "footprint": "xd74ls181.kicad_mod",
      "model_3d": "xd74ls181-etched.glb",
      "model_3d_plain": "xd74ls181.glb",
      "model_3d_step": "xd74ls181-etched.step",
      "model_3d_step_plain": "xd74ls181.step",
      "lbr": "xd74ls181.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "B0",
        "type": "input",
        "description": "B-operand bit 0 input (active-low B0 for Table 1 / active-high B0 for Table 2). One of the four bits of the B operand presented to the ALU."
      },
      {
        "number": "2",
        "name": "A0",
        "type": "input",
        "description": "A-operand bit 0 input (active-low A0 for Table 1 / active-high A0 for Table 2). One of the four bits of the A operand presented to the ALU."
      },
      {
        "number": "3",
        "name": "S3",
        "type": "input",
        "description": "Function-select input bit 3. Together with S0-S2 selects one of 16 arithmetic or logic operations per Tables 1 and 2."
      },
      {
        "number": "4",
        "name": "S2",
        "type": "input",
        "description": "Function-select input bit 2. Together with S0, S1, S3 selects one of 16 ALU operations."
      },
      {
        "number": "5",
        "name": "S1",
        "type": "input",
        "description": "Function-select input bit 1. Together with S0, S2, S3 selects one of 16 ALU operations."
      },
      {
        "number": "6",
        "name": "S0",
        "type": "input",
        "description": "Function-select input bit 0. Together with S1, S2, S3 selects one of 16 ALU operations."
      },
      {
        "number": "7",
        "name": "Cn",
        "type": "input",
        "description": "Carry input to the ALU (active-low Cn for Table 1 / active-high Cn for Table 2). Provides the incoming carry for arithmetic operations; ignored during logic operations when M is high."
      },
      {
        "number": "8",
        "name": "M",
        "type": "input",
        "description": "Mode control input. M=H selects the 16 logic functions (internal carry disabled); M=L selects the 16 arithmetic operations (internal carries enabled)."
      },
      {
        "number": "9",
        "name": "F0",
        "type": "output",
        "description": "Function output bit 0 (active-low F0 for Table 1 / active-high F0 for Table 2). Represents bit 0 of the ALU result F."
      },
      {
        "number": "10",
        "name": "F1",
        "type": "output",
        "description": "Function output bit 1 (active-low F1 for Table 1 / active-high F1 for Table 2). Represents bit 1 of the ALU result F."
      },
      {
        "number": "11",
        "name": "F2",
        "type": "output",
        "description": "Function output bit 2 (active-low F2 for Table 1 / active-high F2 for Table 2). Represents bit 2 of the ALU result F."
      },
      {
        "number": "12",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "13",
        "name": "F3",
        "type": "output",
        "description": "Function output bit 3 (active-low F3 for Table 1 / active-high F3 for Table 2). Represents the most-significant bit of the ALU result F."
      },
      {
        "number": "14",
        "name": "A=B",
        "type": "output",
        "description": "Comparator output. Open-collector; goes high when the four F outputs are all high, indicating A equals B when the ALU is in subtract mode with Cn=H. Can be wire-AND'd across cascaded devices for comparison of more than four bits."
      },
      {
        "number": "15",
        "name": "P",
        "type": "output",
        "description": "Carry propagate output (active-low P for Table 1 / X for Table 2). Used with a look-ahead carry generator such as the SN74LS182 to build fast wider adders."
      },
      {
        "number": "16",
        "name": "Cn+4",
        "type": "output",
        "description": "Ripple carry output from the ALU (active-low Cn+4 for Table 1 / active-high Cn+4 for Table 2). Provides the carry to the next 4-bit slice when full look-ahead is not used."
      },
      {
        "number": "17",
        "name": "G",
        "type": "output",
        "description": "Carry generate output (active-low G for Table 1 / Y for Table 2). Combined with P and a look-ahead carry generator to produce fast carries for wider adders."
      },
      {
        "number": "18",
        "name": "B3",
        "type": "input",
        "description": "B-operand bit 3 (MSB) input (active-low B3 for Table 1 / active-high B3 for Table 2)."
      },
      {
        "number": "19",
        "name": "A3",
        "type": "input",
        "description": "A-operand bit 3 (MSB) input (active-low A3 for Table 1 / active-high A3 for Table 2)."
      },
      {
        "number": "20",
        "name": "B2",
        "type": "input",
        "description": "B-operand bit 2 input (active-low B2 for Table 1 / active-high B2 for Table 2)."
      },
      {
        "number": "21",
        "name": "A2",
        "type": "input",
        "description": "A-operand bit 2 input (active-low A2 for Table 1 / active-high A2 for Table 2)."
      },
      {
        "number": "22",
        "name": "B1",
        "type": "input",
        "description": "B-operand bit 1 input (active-low B1 for Table 1 / active-high B1 for Table 2)."
      },
      {
        "number": "23",
        "name": "A1",
        "type": "input",
        "description": "A-operand bit 1 input (active-low A1 for Table 1 / active-high A1 for Table 2)."
      },
      {
        "number": "24",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage input. Recommended 4.75 V to 5.25 V (nominal 5 V); absolute maximum 7 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588896624320131072",
        "pages": 11,
        "sha256": "ab5b774bf827e79e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 24,
        "described": 24,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74LS181",
      "logic_family": "74LS",
      "function_code": "181",
      "function_class": null,
      "function_name": null,
      "manufacturer": "XINLUDA",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "xd74ls181.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          31.75,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "305ecc33779421c4eaa38993d80432e50eb6e02cae0807055a4a07ffcb2f0d2b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xd74ls181-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          31.75,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f4262eb90a0d255f0fabc701dcc60cf460954284f7360d60d75e7bec3d92527f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "XINLUDA",
      "Package": "DIP-24",
      "Category": "Logic",
      "Pins": "24"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "xd74ls181"
  ],
  "discovery_pitch": "XD74LS181 (XINLUDA) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "xd74ls181.kicad_sym",
    "xd74ls181.kicad_mod",
    "xd74ls181.glb",
    "xd74ls181.step",
    "xd74ls181.lbr",
    "docs/hero.png",
    "docs/xd74ls181-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T14:25:39.127Z"
}