# XD17324

**XINLUDA** · Operational Amplifier · DIP-14

XD17324 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vout1 | output | Output of amplifier 1. |
| 2 | Vin(-)1 | power_in | Inverting input of amplifier 1; common mode range -0.3 V to +VCC. |
| 3 | Vin(+)1 | power_in | Non-inverting input of amplifier 1; common mode range -0.3 V to +VCC. |
| 4 | VCC | power_in | Positive supply pin; absolute maximum 32 V. |
| 5 | Vin(+)2 | power_in | Non-inverting input of amplifier 2; common mode range -0.3 V to +VCC. |
| 6 | Vin(-)2 | power_in | Inverting input of amplifier 2; common mode range -0.3 V to +VCC. |
| 7 | Vout2 | output | Output of amplifier 2. |
| 8 | Vout3 | output | Output of amplifier 3. |
| 9 | Vin(-)3 | power_in | Inverting input of amplifier 3; common mode range -0.3 V to +VCC. |
| 10 | Vin(+)3 | power_in | Non-inverting input of amplifier 3; common mode range -0.3 V to +VCC. |
| 11 | VEE | power_in | Negative supply / ground pin for single-supply operation. |
| 12 | Vin(+)4 | power_in | Non-inverting input of amplifier 4; common mode range -0.3 V to +VCC. |
| 13 | Vin(-)4 | power_in | Inverting input of amplifier 4; common mode range -0.3 V to +VCC. |
| 14 | Vout4 | output | Output of amplifier 4. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-14 |
| Category | Amplifiers |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC |  |  | 32 | V |  | 2 |
| Output sink current | Iosink |  |  | 50 | mA |  | 2 |
| Common mode input voltage | VCM | -0.3 |  |  | V | Printed as -0.3 to +VCC; upper limit is VCC (not numeric) | 2 |
| Output voltage | Vout | -0.3 |  |  | V | Printed as -0.3 to +VCC; upper limit is VCC (not numeric) | 2 |
| Allowable power dissipation (DIP) | PT |  |  | 625 | mW | Allowable up to Ta = 50°C; derate 8.3 mW/°C | 2 |
| Operating temperature | Topr | -40 |  | 85 | °C |  | 2 |
| Storage temperature | Tstg | -55 |  | 125 | °C |  | 2 |
| Input offset voltage | VIO |  | 2 | 7 | mV | VCM = 7.5 V, RS = 50 Ω, Rf = 50 kΩ | 3 |
| Input offset current | IIO |  | 5 | 50 | nA | VCM = 7.5 V, IIO = /II (-), II (+)/ | 3 |
| Input bias current | IIB |  | 30 | 500 | nA | VCM = 7.5 V | 3 |
| Power source rejection ratio | PSRR | 93 |  |  | dB | f = 100 Hz, RS = 1 kΩ, Rj = 100 kΩ | 3 |
| Voltage gain | AVD | 75 | 90 |  | dB | RS = 1 kΩ, Rf = 100 kΩ, RL = ∞ | 3 |
| Common mode rejection ratio | CMR | 80 |  |  | dB | RS = 50 Ω, Rf = 5 kΩ | 3 |
| Common mode input voltage range | VCM | -0.3 |  | 13.5 | V | RS = 1 kΩ, Rf = 100 kΩ, f = 100 Hz | 3 |
| Maximum output voltage | VOP-P |  | 13.6 |  | V | f = 100 Hz, RS = 1 kΩ, Rf = 100 kΩ, RL = 20 kΩ | 3 |
| Output source current | Iosource | 20 | 40 |  | mA | VIN+ = 1 V, VIN- = 0 V, VOH = 10 V | 3 |
| Output sink current | Iosink | 10 | 20 |  | mA | VIN = 0 V, VIN = 1 V, VOL = 2.5 V | 3 |
| Supply current | ICC |  | 0.8 | 2 | mA | VIN = GND, RL = ∞ | 3 |
| Slew rate | SR |  | 0.19 |  | V/µs | f = 1.5 kHz, VCM = 7.5 V, RL = ∞ | 3 |
| Channel separation | CS |  | 120 |  | dB | f = 1 kHz | 3 |
| Output sink current | Iosink | 15 | 50 |  | µA | VIN+ = 0 V, VIN- = 1 V, VOL = 200 mV | 3 |
| Output sink current | Iosink | 3 | 9 |  | mA | VIN+ = 0 V, VIN- = 1 V, VOL = 1 V | 3 |
| Output voltage high | VOH1 | 13.2 | 13.6 |  | V | IOH = -1 mA | 3 |
| Output voltage high | VOH2 | 12 | 13.3 |  | V | IOH = -10 mA | 3 |
| Output voltage low | VOL1 |  | 0.8 | 1 | V | IOL = 1 mA | 3 |
| Output voltage low | VOL2 |  | 1.1 | 1.8 | V | IOL = 10 mA | 3 |

## CAD (KiCad official)

- Symbol: `XD17324`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `xd17324-etched.step` / `xd17324-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xd17324.step` / `xd17324.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XINLUDA datasheet](docs/xd17324-datasheet.pdf) (6 pp, sha256 `dcac9b95ab9c4c96`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xd17324-datasheet.pdf)