component
XCF02SVOG20C
Public Made by Adomby adom
XILINX CPLD/FPGA, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "xcf02svog20c",
"version": "0.1.0",
"type": "component",
"description": "XILINX CPLD/FPGA, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"xcf02svog20c",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"xcf02svog20c.kicad_sym",
"xcf02svog20c.kicad_mod",
"xcf02svog20c.glb",
"xcf02svog20c.step",
"xcf02svog20c.lbr",
"docs/hero.png",
"docs/xcf02svog20c-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"xcf02svog20c-hero.glb",
"xcf02svog20c-hero.overlay.json",
"xcf02svog20c-etched.glb"
],
"component": {
"mpn": "XCF02SVOG20C",
"manufacturer": "XILINX",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Embedded Processors & Controllers",
"subcategory": "CPLD/FPGA",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/67b4832deaf5f941f6b6e126e32940d8.pdf",
"parts": {
"symbol": "xcf02svog20c.kicad_sym",
"footprint": "xcf02svog20c.kicad_mod",
"model_3d": "xcf02svog20c-hero.glb",
"model_3d_plain": "xcf02svog20c-etched.glb",
"model_3d_step": "xcf02svog20c-etched.step",
"model_3d_step_plain": "xcf02svog20c.step",
"lbr": "xcf02svog20c.lbr"
},
"distributor_links": {
"lcsc": "C569040",
"digikey": "122-1287-5-ND",
"mouser": "217-XCF02SVOG20C"
},
"distributor_check": {
"checked_at": "2026-10-23T03:07:03Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "122-1287-5-ND",
"status": "found",
"lifecycle": "Obsolete"
},
"mouser": {
"pn": "217-XCF02SVOG20C",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "D0",
"type": "tri_state",
"description": "DATA output pin providing data for configuring an FPGA in serial mode, set to high-impedance during ISPEN (when not clamped)."
},
{
"number": "2",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "3",
"name": "CLK",
"type": "input",
"description": "Configuration clock input; each rising edge increments the internal address counter if CLK is selected, CE is Low and OE/RESET is High."
},
{
"number": "4",
"name": "TDI",
"type": "input",
"description": "JTAG serial data input to all instruction and data registers, with an internal 50 kΩ pull-up to VCCJ."
},
{
"number": "5",
"name": "TMS",
"type": "input",
"description": "JTAG mode select input sampled on rising edge of TCK to determine TAP state transitions, with an internal 50 kΩ pull-up to VCCJ."
},
{
"number": "6",
"name": "TCK",
"type": "input",
"description": "JTAG test clock input that sequences the TAP controller and all JTAG test and programming electronics."
},
{
"number": "7",
"name": "CF",
"type": "output",
"description": "Configuration pulse open-drain output, pulsed Low by the JTAG CONFIG command to initiate FPGA configuration without powering down the FPGA."
},
{
"number": "8",
"name": "OE/RESET",
"type": "bidirectional",
"description": "Open-drain output enable/reset I/O; when Low it holds the address counter reset and DATA in high-impedance, and it is held Low during internal power-on reset."
},
{
"number": "9",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "10",
"name": "CE",
"type": "input",
"description": "Chip enable input; when High the device enters low-power standby, the address counter is reset and DATA pins are high-impedance."
},
{
"number": "11",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "12",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "13",
"name": "CEO",
"type": "output",
"description": "Chip enable output connected to the CE input of the next PROM in the chain, Low when CE is Low, OE/RESET is High and the address counter is beyond its terminal count."
},
{
"number": "14",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "15",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "16",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; this pin must be left unconnected."
},
{
"number": "17",
"name": "TDO",
"type": "output",
"description": "JTAG serial data output for all instruction and data registers, with an internal 50 kΩ pull-up to VCCJ."
},
{
"number": "18",
"name": "VCCINT",
"type": "power_in",
"description": "+3.3V supply voltage for internal logic."
},
{
"number": "19",
"name": "VCCO",
"type": "power_in",
"description": "+3.3V, 2.5V, or 1.8V I/O supply connected to the output voltage drivers and input buffers."
},
{
"number": "20",
"name": "VCCJ",
"type": "power_in",
"description": "+3.3V or 2.5V JTAG I/O supply connected to the TDO output driver and TCK, TMS, and TDI input buffers."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin types for D0 (tri_state) and CF (output, open-drain) are inferred from the descriptions; the dat"
],
"pages_sent": 14,
"cost_usd": 0.1775,
"at": "2026-10-23T03:06:42"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/67b4832deaf5f941f6b6e126e32940d8.pdf",
"pages": 35,
"sha256": "a9dea23235e03c9b",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "xcf02svog20c-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "7b337dc2fa9d9f062abaf31513ddaeb34696486bb9c060780dc9d8985d7febac",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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]
}
}