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WSD6040DN56
Public Made by Adomby adom
Winsok Semicon MOSFETs, DFN-8-EP(6.1x5.2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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wsd6040dn56: specified limits as data (metadata.characteristics, 26 rows from the datasheet)
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17d ago
WSD6040DN56
Winsok Semicon · MOSFETs · DFN-8-EP(6.1x5.2)
WSD6040DN56 from Winsok Semicon, in a DFN-8-EP(6.1x5.2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 2 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 3 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 4 | G | input | Gate of the N-channel MOSFET, rated for VGS of ±20 V with a typical threshold of 1.6 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 6 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 7 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 8 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | DFN-8-EP(6.1x5.2) |
| Category | Transistors/Thyristors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(TH) | 1 | 1.6 | 2.5 | V | VGS = VDS, IDS = 250µA | 2 |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VGS = ±20V, VDS = 0V | 2 | |
| Drain-Source Breakdown Voltage | V(BR)DSS | 60 | V | VGS = 0V, ID = 250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 48 V, VGS = 0V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 30 | µA | VDS = 48 V, VGS = 0V, TJ=85°C | 2 | ||
| Drain-Source On-state Resistance | RDS(on) | 14 | 17.5 | mΩ | VGS = 10V, ID = 25A | 2 | |
| Drain-Source On-state Resistance | RDS(on) | 19 | 22 | mΩ | VGS = 4.5V, ID = 20A | 2 | |
| Diode Forward Voltage | VSD | 0.8 | 1.3 | V | ISD = 20A, VGS=0V | 2 | |
| Drain-Source Voltage | VDS | 60 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 36 | A | TC=25°C | 1 | ||
| Continuous Drain Current | ID | 22 | A | TC=100°C | 1 | ||
| Continuous Drain Current | ID | 8.4 | A | TA=25°C | 1 | ||
| Continuous Drain Current | ID | 6.8 | A | TA=100°C | 1 | ||
| Pulsed Drain Current | IDM | 140 | A | 1 | |||
| Avalanche Current | IAS | 16 | A | Single pulse L=0.5mH | 1 | ||
| Single Pulse Avalanche Energy | EAS | 64 | mJ | Single pulse L=0.5mH | 1 | ||
| Diode Continuous Forward Current | IS | 18 | A | 1 | |||
| Maximum Power Dissipation | PD | 37.8 | W | TC=25°C | 1 | ||
| Maximum Power Dissipation | PD | 15.1 | W | TC=100°C | 1 | ||
| Maximum Power Dissipation | PD | 2.08 | W | TA=25°C | 1 | ||
| Maximum Power Dissipation | PD | 1.33 | W | TA=70°C | 1 | ||
| Maximum Junction Temperature | TJ | 150 | ℃ | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction to Ambient | RθJA | 60 | ℃/W | Steady state; surface mounted on 1in² pad area | 1 | ||
| Thermal Resistance Junction to Case | RθJC | 3.3 | ℃/W | Steady state | 1 |
CAD (KiCad official)
- Symbol:
WSD6040DN56 - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8-EP(6.1x5.2) (KiCad packages3D, STEP)
- 3D model files:
wsd6040dn56-etched.step/wsd6040dn56-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wsd6040dn56.step/wsd6040dn56.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Winsok Semicon datasheet (6 pp, sha256
338ffdd02eb6a03e, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WSD6040DN56
**Winsok Semicon** · MOSFETs · DFN-8-EP(6.1x5.2)
WSD6040DN56 from Winsok Semicon, in a DFN-8-EP(6.1x5.2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 2 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 3 | S | passive | Source of the N-channel MOSFET, pins 1, 2 and 3 are tied together; the datasheet shows them as the source terminal. |
| 4 | G | input | Gate of the N-channel MOSFET, rated for VGS of ±20 V with a typical threshold of 1.6 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 6 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 7 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 8 | D | passive | Drain of the N-channel MOSFET, pins 5 to 8 are tied together; VDS is rated at 60 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | DFN-8-EP(6.1x5.2) |
| Category | Transistors/Thyristors |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(TH) | 1 | 1.6 | 2.5 | V | VGS = VDS, IDS = 250µA | 2 |
| Gate Leakage Current | IGSS | -100 | | 100 | nA | VGS = ±20V, VDS = 0V | 2 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 60 | | | V | VGS = 0V, ID = 250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | 1 | | µA | VDS = 48 V, VGS = 0V | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 30 | µA | VDS = 48 V, VGS = 0V, TJ=85°C | 2 |
| Drain-Source On-state Resistance | RDS(on) | | 14 | 17.5 | mΩ | VGS = 10V, ID = 25A | 2 |
| Drain-Source On-state Resistance | RDS(on) | | 19 | 22 | mΩ | VGS = 4.5V, ID = 20A | 2 |
| Diode Forward Voltage | VSD | | 0.8 | 1.3 | V | ISD = 20A, VGS=0V | 2 |
| Drain-Source Voltage | VDS | | | 60 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 36 | A | TC=25°C | 1 |
| Continuous Drain Current | ID | | | 22 | A | TC=100°C | 1 |
| Continuous Drain Current | ID | | | 8.4 | A | TA=25°C | 1 |
| Continuous Drain Current | ID | | | 6.8 | A | TA=100°C | 1 |
| Pulsed Drain Current | IDM | | | 140 | A | | 1 |
| Avalanche Current | IAS | | | 16 | A | Single pulse L=0.5mH | 1 |
| Single Pulse Avalanche Energy | EAS | | | 64 | mJ | Single pulse L=0.5mH | 1 |
| Diode Continuous Forward Current | IS | | | 18 | A | | 1 |
| Maximum Power Dissipation | PD | | | 37.8 | W | TC=25°C | 1 |
| Maximum Power Dissipation | PD | | | 15.1 | W | TC=100°C | 1 |
| Maximum Power Dissipation | PD | | | 2.08 | W | TA=25°C | 1 |
| Maximum Power Dissipation | PD | | | 1.33 | W | TA=70°C | 1 |
| Maximum Junction Temperature | TJ | | | 150 | ℃ | | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance Junction to Ambient | RθJA | | | 60 | ℃/W | Steady state; surface mounted on 1in² pad area | 1 |
| Thermal Resistance Junction to Case | RθJC | | | 3.3 | ℃/W | Steady state | 1 |
## CAD (KiCad official)
- Symbol: `WSD6040DN56`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN-8-EP(6.1x5.2) (KiCad packages3D, STEP)
- 3D model files: `wsd6040dn56-etched.step` / `wsd6040dn56-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wsd6040dn56.step` / `wsd6040dn56.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588915914763223040) (6 pp, sha256 `338ffdd02eb6a03e`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/wsd6040dn56-datasheet.pdf)