# WSD40L60DN56

**Winsok Semicon** · MOSFETs · DFN5x6-8

WSD40L60DN56 from Winsok Semicon, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the drawing shows three S pins on the same side as G, and the part is rated for continuous drain current of -60A at TC=25C. |
| 2 | S | passive | Source of the P-channel MOSFET, tied with the other source pins; the datasheet gives VDS of -40V and a body-diode continuous source current IS of -50A. |
| 3 | S | passive | Source of the P-channel MOSFET, tied with the other source pins; pulsed drain current is rated at -150A. |
| 4 | G | input | Gate of the P-channel MOSFET with a gate-source voltage rating of ±20V and a threshold of -1.2V min to -2.5V max at ID=-250uA. |
| 5 | D | passive | Drain of the P-channel MOSFET, with a drain-source voltage rating of -40V and RDS(ON) of 10mΩ typ at VGS=-10V, ID=-15A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied with the other drain pins; continuous drain current is -60A at TC=25C and -35A at TC=100C. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied with the other drain pins; pulsed drain current is rated at -150A. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied with the other drain pins; RθJC is 2.5 C/W max. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | DFN5x6-8 |
| Category | Transistors/Thyristors |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -40 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID@TC=25℃ | -60 |  |  | A | VGS @ -10V | 1 |
| Continuous Drain Current | ID@TC=100℃ | -35 |  |  | A | VGS @ -10V | 1 |
| Pulsed Drain Current | IDM | -150 |  |  | A |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 150 | mJ |  | 1 |
| Avalanche Current | IAS | -30 |  |  | A |  | 1 |
| Total Power Dissipation | PD@TC=25℃ |  |  | 50 | W | TC=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance Junction-Ambient | RθJA |  |  | 62.5 | ℃/W |  | 1 |
| Thermal Resistance Junction-Ambient (t ≤10s) | RθJA |  |  | 40 | ℃/W | t ≤10s | 1 |
| Thermal Resistance Junction-Case | RθJC |  |  | 2.5 | ℃/W |  | 1 |
| Drain-Source Breakdown Voltage | BVDSS | -40 |  |  | V | VGS=0V, ID=-250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 10 | 14 | mΩ | VGS=-10V, ID=-15A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  | 14 | 21 | mΩ | VGS=-4.5V, ID=-10A | 2 |
| Gate Threshold Voltage | VGS(th) | -1.2 | -1.7 | -2.5 | V | VGS=VDS, ID=-250uA | 2 |
| Drain-Source Leakage Current | IDSS |  |  | -1 | uA | VDS=-32V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current | IDSS |  |  | -5 | uA | VDS=-32V, VGS=0V, TJ=55℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Single Pulse Avalanche Energy | EAS | 100 |  |  | mJ | VDD=-20V, L=0.5mH, IAS=-24A | 2 |
| Continuous Source Current | IS |  |  | -50 | A | VG=VD=0V, Force Current | 2 |
| Pulsed Source Current | ISM |  |  | -150 | A |  | 2 |
| Diode Forward Voltage | VSD |  |  | -1 | V | VGS=0V, IS=-1A, TJ=25℃ | 2 |

## CAD (KiCad official)

- Symbol: `WSD40L60DN56`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN5x6-8 (KiCad packages3D, STEP)
- 3D model files: `wsd40l60dn56-etched.step` / `wsd40l60dn56-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wsd40l60dn56.step` / `wsd40l60dn56.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454572654497792) (6 pp, sha256 `5d4d2fd77488600d`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/wsd40l60dn56-datasheet.pdf)