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W25Q32JWSSIM TR

Winbond Elec · NOR FLASH · SOIC-8

W25Q32JWSSIM TR from Winbond Elec, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Chip Select Input: when /CS is high the device is deselected and the serial data outputs are at high impedance, and /CS must go from high to low before a new instruction is accepted after power-up.
2 DO (IO1) bidirectional Data Output (Data Input Output 1), used as the unidirectional data output in Standard SPI and as bidirectional IO1 in Dual and QPI/Quad SPI operation.
3 /WP (IO2) bidirectional Write Protect Input (Data Input Output 2): active-low pin that, with the Status Register CMP, SEC, TB, BP[2:0] and SRP bits, protects the array or Status Register from writes, and becomes IO2 when QE=1, where the write-protect function is unavailable.
4 GND power_in Ground reference for the device.
5 DI (IO0) bidirectional Data Input (Data Input Output 0), used as the unidirectional data input in Standard SPI and as bidirectional IO0 in Dual and Quad/QPI operation.
6 CLK input Serial Clock Input providing the timing for serial input and output operations.
7 /HOLD or /RESET (IO3) bidirectional Hold or Reset Input (Data Input Output 3): when QE=0 it is /HOLD (active low, pauses Standard/Dual SPI operation while /CS is low) or /RESET per the HOLD/RST status bit, and when QE=1 it is IO3 with the /HOLD and /RESET functions disabled.
8 VCC power_in Power Supply: single 1.7V to 1.95V supply, with the /CS pin tracking VCC at power-up and power-down.

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Ambient Temperature (Industrial) TA -40 85 °C Industrial 84
Supply Voltage VCC 1.7 1.95 V FR = 133MHz, fR = 50MHz 84
Supply Voltage VCC -0.6 2.5 V 84
Voltage Applied to Any Pin VIO -0.6 V Relative to Ground 84
Transient Voltage on any Pin (<20nS transient) VIOT -2 V Relative to Ground 84
Storage Temperature TSTG -65 150 °C 84
Electrostatic Discharge Voltage VESD -2000 2000 V Human Body Model 84
VCC (min) to /CS Low tVSL 20 µs 85
Time Delay Before Write Instruction tPUW 5 ms 85
Write Inhibit Threshold Voltage VWI 1 1.4 V 85
Minimum duration for ensuring initialization tPWD 100 µs 85
VCC voltage needed to fall below for ensuring initialization VPWD 0.8 V 85
Input Capacitance CIN 6 pF VIN = 0V 87
Output Capacitance Cout 8 pF VOUT = 0V 87
Input Leakage ILI -2 2 µA 87
I/O Leakage ILO -2 2 µA 87
Standby Current ICC1 10 25 µA /CS = VCC, VIN = GND or VCC 87
Power-down Current ICC2 0.1 5 µA /CS = VCC, VIN = GND or VCC 87
Current Read Data / Dual / Quad 1MHz ICC3 1 3 mA C = 0.1 VCC / 0.9 VCC, DO = Open, checker board pattern 87
Current Read Data / Dual / Quad 50MHz ICC3 8 10 mA C = 0.1 VCC / 0.9 VCC, DO = Open, checker board pattern 87
Current Read Data / Dual Output / Quad Output 104MHz Icc3 10 12 mA C = 0.1 VCC / 0.9 VCC, DO = Open, checker board pattern 87
Current Write Status Register Icc4 15 20 mA /CS = VCC 87
Current Page Program Icc5 15 20 mA /CS = VCC 87
Current Sector/Block Erase Icc6 15 20 mA /CS = VCC 87
Current Chip Erase Icc7 15 20 mA /CS = VCC 87
Input Low Voltage Vil -0.5 V 87
Output Low Voltage Vol 0.2 V Iol = 100 µA 87
Clock frequency for SPI-EBh instruction FR 133 MHz 89
Clock frequency except for Read Data (03h) & DTR instructions FR 104 MHz 89
Clock frequency DTR instructions FR 66 MHz 89
Clock frequency for Read Data instruction (03h) fR 50 MHz 89
Data In Setup Time tDVCH 1 ns 89
Data In Hold Time tCHDX 2 ns 89
/CS Active Setup Time relative to CLK tSLCH 3 ns 89
/CS Not Active Hold Time relative to CLK tCHSL 3 ns 89
/CS Active Hold Time relative to CLK tCHSH 3 ns 89
/CS Not Active Setup Time relative to CLK tSHCH 3 ns 89
/CS Deselect Time (for Read) tSHSL1 10 ns 89
/CS Deselect Time (for Erase or Program or Write) tSHSL2 50 ns 89
Output Disable Time tSHQZ 7 ns 89
Clock Low to Output Valid tCLQV 6 ns 89
Output Hold Time tCLQX 1.5 ns 89
/HOLD Active Setup Time relative to CLK tHLCH 5 ns 89
/HOLD Active Hold Time relative to CLK tCHHH 5 ns 90
/HOLD Not Active Setup Time relative to CLK tHHCH 5 ns 90
/HOLD Not Active Hold Time relative to CLK tCHHL 5 ns 90
/HOLD to Output Low-Z tHHQX 7 ns 90
/HOLD to Output High-Z tHLQZ 12 ns 90
Write Protect Setup Time Before /CS Low tWHSL 20 ns 90
Write Protect Hold Time After /CS High tSHWL 100 ns 90
/CS High to Power-down Mode tDP 3 µs 90
/CS High to Standby Mode without ID Read tRES1 30 µs 90
/CS High to next Instruction after Suspend tSUS 20 µs 90
/CS High to next Instruction after Reset tRST 30 µs 90
Write Status Register Time tW 2 30 ms 90
Page Program Time tPP 0.8 5 ms 90
Sector Erase Time (4KB) tSE 45 400 ms 90
Block Erase Time (32KB) tBE1 120 1600 ms 90
Block Erase Time (64KB) tBE2 200 2000 ms 90
Chip Erase Time tCE 10 50 s 90

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 10.1 8-Pin SOIC 150-mil (Package Code SN)........................................................................ 92 10.2 8-Pin SOIC 208-mil (Package Code SS) ......................................... 4

CAD (KiCad official)

  • Symbol: W25Q32JWSSIM TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: w25q32jwssim-tr-etched.step / w25q32jwssim-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25q32jwssim-tr.step / w25q32jwssim-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (104 pp, sha256 cda2ab0a82645468, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF