component
VS3640DS
Public Made by Adomby adom
Vanguard MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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VS3640DS
Vanguard · MOSFETs · SOP-8
VS3640DS from Vanguard, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel), with diode continuous forward current of 2.3 A at TA=25°C. |
| 2 | G1 | input | Gate of MOSFET 1, 5V logic level control with gate-source voltage limit of ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel), with diode continuous forward current of 2.3 A at TA=25°C. |
| 4 | G2 | input | Gate of MOSFET 2, 5V logic level control with gate-source voltage limit of ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 6). |
| 6 | D2 | passive | Drain of MOSFET 2, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 5). |
| 7 | D1 | passive | Drain of MOSFET 1, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 8). |
| 8 | D1 | passive | Drain of MOSFET 1, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 7). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vanguard |
| Package | SOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source breakdown voltage | V(BR)DSS | 30 | V | VGS=0V, ID=250μA | 2 | ||
| Zero Gate Voltage Drain Current (Tc=25℃) | IDSS | 1 | μA | VDS=30V, VGS=0V | 2 | ||
| Zero Gate Voltage Drain Current (Tc=125℃) | IDSS | 100 | μA | VDS=30V, VGS=0V | 2 | ||
| Gate-Body Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | 1 | 1.9 | 2.5 | V | VDS=VGS, ID=250μA | 2 |
| Drain-Source On-State Resistance | RDS(ON) | 16 | 19 | mΩ | VGS=10V, ID=8A | 2 | |
| Drain-Source On-State Resistance | RDS(ON) | 24 | 29 | mΩ | VGS=4.5V, ID=4A | 2 | |
| Forward on voltage | VSD | 0.9 | 1.2 | V | ISD=8A, VGS=0V | 2 | |
| Diode continuous forward current | IS | 2.3 | A | TA=25°C | 1 | ||
| Continuous drain current | ID | 9 | A | VGS=10V, TA=25°C | 1 | ||
| Continuous drain current | ID | 5.7 | A | VGS=10V, TA=100°C | 1 | ||
| Pulse drain current tested | IDM | 36 | A | TA=25°C | 1 | ||
| Avalanche energy, single pulsed | EAS | 9 | mJ | single pulsed | 1 | ||
| Maximum power dissipation | PD | 2 | W | TA=25°C | 1 | ||
| Gate-Source voltage | VGS | -20 | 20 | V | 1 | ||
| Storage temperature range | TSTG | -55 | 150 | °C | 1 | ||
| Thermal Resistance-Junction to Lead | RθJL | 40 | °C/W | 1 | |||
| Thermal Resistance-Junction to Ambient | RθJA | 62.5 | °C/W | 1 |
CAD (KiCad official)
- Symbol:
VS3640DS - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
vs3640ds-etched.step/vs3640ds-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);vs3640ds.step/vs3640ds.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vanguard datasheet (6 pp, sha256
9f3fd23bbd4b7902, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# VS3640DS
**Vanguard** · MOSFETs · SOP-8
VS3640DS from Vanguard, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel), with diode continuous forward current of 2.3 A at TA=25°C. |
| 2 | G1 | input | Gate of MOSFET 1, 5V logic level control with gate-source voltage limit of ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel), with diode continuous forward current of 2.3 A at TA=25°C. |
| 4 | G2 | input | Gate of MOSFET 2, 5V logic level control with gate-source voltage limit of ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 6). |
| 6 | D2 | passive | Drain of MOSFET 2, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 5). |
| 7 | D1 | passive | Drain of MOSFET 1, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 8). |
| 8 | D1 | passive | Drain of MOSFET 1, rated 30 V drain-source and 9 A continuous at TA=25°C (tied to pin 7). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vanguard |
| Package | SOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source breakdown voltage | V(BR)DSS | 30 | | | V | VGS=0V, ID=250μA | 2 |
| Zero Gate Voltage Drain Current (Tc=25℃) | IDSS | | | 1 | μA | VDS=30V, VGS=0V | 2 |
| Zero Gate Voltage Drain Current (Tc=125℃) | IDSS | | | 100 | μA | VDS=30V, VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(TH) | 1 | 1.9 | 2.5 | V | VDS=VGS, ID=250μA | 2 |
| Drain-Source On-State Resistance | RDS(ON) | | 16 | 19 | mΩ | VGS=10V, ID=8A | 2 |
| Drain-Source On-State Resistance | RDS(ON) | | 24 | 29 | mΩ | VGS=4.5V, ID=4A | 2 |
| Forward on voltage | VSD | | 0.9 | 1.2 | V | ISD=8A, VGS=0V | 2 |
| Diode continuous forward current | IS | | | 2.3 | A | TA=25°C | 1 |
| Continuous drain current | ID | | | 9 | A | VGS=10V, TA=25°C | 1 |
| Continuous drain current | ID | | | 5.7 | A | VGS=10V, TA=100°C | 1 |
| Pulse drain current tested | IDM | | | 36 | A | TA=25°C | 1 |
| Avalanche energy, single pulsed | EAS | | | 9 | mJ | single pulsed | 1 |
| Maximum power dissipation | PD | | | 2 | W | TA=25°C | 1 |
| Gate-Source voltage | VGS | -20 | | 20 | V | | 1 |
| Storage temperature range | TSTG | -55 | | 150 | °C | | 1 |
| Thermal Resistance-Junction to Lead | RθJL | | 40 | | °C/W | | 1 |
| Thermal Resistance-Junction to Ambient | RθJA | | 62.5 | | °C/W | | 1 |
## CAD (KiCad official)
- Symbol: `VS3640DS`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `vs3640ds-etched.step` / `vs3640ds-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `vs3640ds.step` / `vs3640ds.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Vanguard datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884302268944384) (6 pp, sha256 `9f3fd23bbd4b7902`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/vs3640ds-datasheet.pdf)