main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers vrd1825mtx: viewers · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago
vrd1825mtx-etched.glb Publish 0.1.0 · Ray 17d ago
vrd1825mtx-etched.step vrd1825mtx: factory component page (healed after the 2026-10-18 wiki outage) · Ray 17d ago
vrd1825mtx-hero.glb vrd1825mtx: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
vrd1825mtx-hero.overlay.json Publish 0.1.0 · Ray 17d ago
vrd1825mtx.glb Publish 0.1.0 · Ray 17d ago
vrd1825mtx.kicad_mod Publish 0.1.0 · Ray 17d ago
vrd1825mtx.kicad_sym Publish 0.1.0 · Ray 17d ago
vrd1825mtx.lbr Publish 0.1.0 · Ray 17d ago
vrd1825mtx.step Publish 0.1.0 · Ray 17d ago

VRD1825MTX

AnaSem · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-6

VRD1825MTX from AnaSem, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN1 input Channel-1 enable input; EN is driven to VSS to shut down the regulator and discharge the output through the auto-discharge resistance, with EN high level minimum 1.2V and EN low level maximum 0.3V.
2 VIN power_in Voltage input for both regulators; operating input range is 1.6V to 6.0V and absolute maximum input is -0.3V to +7.0V, with a recommended input capacitor of at least 1.0µF to VSS.
3 EN2 input Channel-2 enable input; EN is driven to VSS to shut down the regulator and discharge the output through the auto-discharge resistance, with EN high level minimum 1.2V and EN low level maximum 0.3V.
4 VOUT2 power_out Channel-2 regulated output that requires a ceramic output capacitor of at least 1.0µF connected close to the pin and VSS, and must not exceed VIN+0.3V to avoid damage through the parasitic diode.
5 VSS power_in Power ground (common return for both channels); output and input capacitors should be connected as close as possible between their terminals and VSS.
6 VOUT1 power_out Channel-1 regulated output that requires a ceramic output capacitor of at least 1.0µF connected close to the pin and VSS, and must not exceed VIN+0.3V to avoid damage through the parasitic diode.

Key specifications

Parameter Value
Manufacturer AnaSem
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage tolerance Ch-1 (1.80V, VOUT≤1.90V) VOUT1 -20 20 mV VOUT+1.0V≦VIN≦6.0V, IOUT=30mA, Ta=-40°C ~ +85°C 7
Output voltage tolerance Ch-2 (2.50V, VOUT≥1.95V) VOUT2 -1 1 % VOUT+1.0V≦VIN≦6.0V, IOUT=30mA, Ta=-40°C ~ +85°C 7
Input voltage VIN 1.6 6 V 8
EN high level voltage VENH 1.2 6 V 8
EN low level voltage VENL 0.3 V 8
EN high level current IENH -0.1 0.1 µA VEN=VIN 8
EN low level current IENL -0.1 0.1 µA VEN=VSS 8
Current consumption IDD 50 80 µA VIN=VOUT+1.0V, VOUT=Open, IOUT=0mA 8
Standby current ISTB 0.01 0.1 µA EN=VSS 8
Load regulation ∆VOUT 10 40 mV VIN=VOUT+1.0V, IOUT=0.1mA ~100mA 8
Line regulation ∆VOUT / ∆VIN•VOUT 0.01 0.1 %/V VOUT+1.0V≦VIN≦6.0V, IOUT=30mA 8
Dropout voltage Ch-1 (1.7V≦VOUT≦2.25V) VDROP 130 205 mV IOUT=100mA, 1.7V≦VOUT≦2.25V 7
Dropout voltage Ch-2 (2.3V≦VOUT≦2.85V) VDROP 100 150 mV IOUT=100mA, 2.3V≦VOUT≦2.85V 7
Output voltage temperature coefficient ∆VOUT /∆Ta•VOUT -20 20 ppm/°C VEN=VIN, IOUT=300mA, Ta=-40°C ~ +85°C 8
Limit current ILIMIT 300 mA EN=VIN 8
Input voltage range (absolute maximum) VIN -0.3 7 V 6
Output current (absolute maximum) IOUT 500 mA 6
Output voltage range (absolute maximum) VOUT -0.3 V 6
Power dissipation SOT-26 PD 600 mW SOT-26, Note 1: PCB 50mm×50mm×1.6mm 6
Operating temperature range TOPR -40 85 °C 6
Storage temperature range TSTG -55 125 °C 6
Output voltage Ch-1 nominal (selection code 18) VOUT1 1.8 V Output voltage selection code 18 3
Output voltage Ch-2 nominal (selection code 25) VOUT2 2.5 V Output voltage selection code 25 3
Output current Ch-1 (1.7V≦VOUT≦2.25V) IOUT 250 mA VIN≧VOUT+1.0V, 1.7V≦VOUT≦2.25V 7
Output current Ch-2 (2.3V≦VOUT≦2.85V) IOUT 250 mA VIN≧VOUT+1.0V, 2.3V≦VOUT≦2.85V 7
Ripple rejection Rr 75 dB VIN=VOUT+1.0V, f=1KHz, ∆VRIP=0.5VP-P, IOUT=30mA 8
Short circuit current ISHORT 40 mA VIN=VOUT+1.0V, VOUT=0V 8
CL auto-discharge resistance RDIS 160 Ω VIN=6.0V, VOUT=4.0V, VEN=VSS 8

CAD (KiCad official)

  • Symbol: VRD1825MTX
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: vrd1825mtx-etched.step / vrd1825mtx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vrd1825mtx.step / vrd1825mtx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: AnaSem datasheet (35 pp, sha256 7f8a0b5646548c27, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF