component
VNL5050S5TR-E
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers and Regulators, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
vnl5050s5tr-e: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
335d7bf
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"title": "VNL5050S5TR-E",
"brief": "STMicroelectronics AC-DC Controllers and Regulators, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
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"mpn": "VNL5050S5TR-E",
"manufacturer": "STMicroelectronics",
"package": "SO-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "AC-DC Controllers and Regulators",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2304140030_STMicroelectronics-VNL5050S5TR-E_C2149847.pdf",
"parts": {
"symbol": "vnl5050s5tr-e.kicad_sym",
"footprint": "vnl5050s5tr-e.kicad_mod",
"model_3d": "vnl5050s5tr-e-etched.glb",
"model_3d_plain": "vnl5050s5tr-e.glb",
"model_3d_step": "vnl5050s5tr-e-etched.step",
"model_3d_step_plain": "vnl5050s5tr-e.step",
"lbr": "vnl5050s5tr-e.lbr"
},
"distributor_links": {
"lcsc": "C2149847"
},
"pins": [
{
"number": "1",
"name": "SUPPLY VOLTAGE",
"type": "power_in",
"description": "Supply voltage for the signal (logic) part, typically 5 V. Feeds the internal SUPPLY/LOGIC block."
},
{
"number": "2",
"name": "INPUT",
"type": "input",
"description": "Voltage-controlled input pin with hysteresis, CMOS compatible. Controls the output switch (power MOS) state. DC input current rating -1 to 10 mA. Recommended pull-down to GND through a 10 kΩ resistor if left unused."
},
{
"number": "3",
"name": "STATUS",
"type": "output",
"description": "Open-drain digital diagnostic pin (VNL5050S5-E only). Signals fault conditions such as overtemperature or open-load. May be left floating if unused; must NOT be tied to ground. DC status current rating -1 to 10 mA."
},
{
"number": "4",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. May be left floating or tied to ground."
},
{
"number": "5",
"name": "DRAIN",
"type": "passive",
"description": "Power MOSFET drain. Connects to the load (low-side switch - the other side of the load ties to the battery). Internally clamped VDS (VCLAMP = 41 V), ID up to 19 A. Pins 5 and 8 are internally tied together."
},
{
"number": "6",
"name": "SOURCE",
"type": "power_in",
"description": "Power MOSFET source and ground reference for the control section. Pins 6 and 7 are internally tied together and used as the device ground."
},
{
"number": "7",
"name": "SOURCE",
"type": "power_in",
"description": "Power MOSFET source and ground reference for the control section. Pins 6 and 7 are internally tied together and used as the device ground."
},
{
"number": "8",
"name": "DRAIN",
"type": "passive",
"description": "Power MOSFET drain. Connects to the load (low-side switch). Pins 5 and 8 are internally tied together; recommended to connect all DRAIN pins to a copper pour for thermal dissipation."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2304140030_STMicroelectronics-VNL5050S5TR-E_C2149847.pdf",
"pages": 33,
"sha256": "44edd20a5e513e96",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
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}
},
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"pin1": {
"pad": "1",
"at": [
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-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "vnl5050s5tr-e.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "vnl5050s5tr-e-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"footprint_binding": "identity",
"sha256": "c1aabdd74d7feddb329ee8fa9760642301f7b3e201f25b96da041718ef9a2283",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "STMicroelectronics",
"Package": "SO-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
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"viewers",
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"info"
],
"discovery_triggers": [
"vnl5050s5tr-e"
],
"discovery_pitch": "VNL5050S5TR-E (STMicroelectronics) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
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"vnl5050s5tr-e.kicad_sym",
"vnl5050s5tr-e.kicad_mod",
"vnl5050s5tr-e.glb",
"vnl5050s5tr-e.step",
"vnl5050s5tr-e-etched.step",
"vnl5050s5tr-e.lbr",
"docs/hero.png",
"docs/vnl5050s5tr-e-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "VNL5050S5-E",
"kind": "unknown"
},
{
"mpn": "VNL5050S5TR-E",
"kind": "packaging"
},
{
"mpn": "VNL5050N3-E",
"kind": "unknown"
},
{
"mpn": "VNL5050N3TR-E",
"kind": "unknown"
}
],
"updated_at": "2026-09-25T13:56:43.099Z"
}