component
VIPER319HDTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 19d ago |
| viewers | 19d ago |
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| page.json | 19d ago |
| README.md | 19d ago |
| viper319hdtr-etched.glb | 19d ago |
| viper319hdtr-etched.step | 19d ago |
| viper319hdtr-hero.glb | 19d ago |
| viper319hdtr-hero.overlay.json | 19d ago |
| viper319hdtr.glb | 19d ago |
| viper319hdtr.kicad_mod | 19d ago |
| viper319hdtr.kicad_sym | 19d ago |
| viper319hdtr.lbr | 19d ago |
| viper319hdtr.step | 19d ago |
VIPER319HDTR
STMicroelectronics · AC-DC Controllers And Regulators · SO-16
VIPER319HDTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source; the return of the internal MOSFET source and the bias current, and all bias-component grounds must run to this pin, kept separate from the pulsed current return. |
| 2 | N.C. | unconnected | Not connected; when designing the PCB this pin can be soldered to GND. |
| 3 | VCC | power_in | Controller supply; an external storage capacitor is required across VCC and GND, and a small 0.1 µF typ. bypass capacitor should be placed as close as possible to the IC. |
| 4 | N.A. | unconnected | Not available for user; mechanically connected to the controller die pad, and it is highly recommended to connect it to GND for noise immunity. |
| 5 | UVP | input | Undervoltage protection: the IC is disabled when VUVP falls below VUVP_th (0.4 V typ.) for more than 30 ms typ., and resumes switching 30 ms typ. after VUVP rises above the threshold; leave open if the feature is not used. |
| 6 | OVP | input | Overvoltage protection: the PWM is disabled in auto-restart for 500 ms typ. when VOVP exceeds 4 V typ. for more than 250 µs typ.; connect to GND if the feature is not required. |
| 7 | FB | input | Direct feedback and inverting input of the internal transconductance E/A, internally referenced to 1.2 V with respect to GND; the E/A is disabled if FB is connected to GND. |
| 8 | COMP | output | Output of the internal E/A; a compensation network between COMP and GND is required for loop stability, and in secondary feedback COMP is driven directly by the optocoupler. |
| 9 | N.C. | unconnected | Not connected; must be left floating to obtain a safe clearance distance. |
| 10 | N.C. | unconnected | Not connected; must be left floating to obtain a safe clearance distance. |
| 11 | N.C. | unconnected | Not connected; must be left floating to obtain a safe clearance distance. |
| 12 | N.C. | unconnected | Not connected; must be left floating to obtain a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain; the internal high-voltage current source draws from these pins to charge the VCC capacitor at startup, and they are mechanically tied to the MOSFET metal pad for heat dissipation. |
| 14 | DRAIN | passive | MOSFET drain; the internal high-voltage current source draws from these pins to charge the VCC capacitor at startup, and they are mechanically tied to the MOSFET metal pad for heat dissipation. |
| 15 | DRAIN | passive | MOSFET drain; the internal high-voltage current source draws from these pins to charge the VCC capacitor at startup, and they are mechanically tied to the MOSFET metal pad for heat dissipation. |
| 16 | DRAIN | passive | MOSFET drain; the internal high-voltage current source draws from these pins to charge the VCC capacitor at startup, and they are mechanically tied to the MOSFET metal pad for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
VIPER319HDTR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
viper319hdtr-etched.step/viper319hdtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper319hdtr.step/viper319hdtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (40 pp, sha256
200c56a12395fdf1, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).