component
VIPER26HDTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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VIPER26HDTR
STMicroelectronics · AC-DC Controllers And Regulators · SO-16
VIPER26HDTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, connecting the source of the internal power MOSFET and the controller ground reference. |
| 2 | GND | power_in | Ground and MOSFET source, connecting the source of the internal power MOSFET and the controller ground reference (same net as pin 1). |
| 3 | N.C. | unconnected | Not connected; this pin can be soldered to GND. |
| 4 | N.A. | passive | Not available for user; it is mechanically connected to the controller die pad and should be connected to GND (pins 1, 2) to improve noise immunity. |
| 5 | VDD | power_in | Controller supply with an external storage capacitor to GND; operating range 11.5 to 23.5 V, startup threshold VDDon 12 to 14 V, undervoltage shutdown VDDoff 7 to 9 V, and a ~0.1 µF bypass capacitor recommended close to the IC. |
| 6 | LIM | input | Drain current limitation; an external resistor to GND lowers the current limit below the default IDlim (0.66 to 0.74 A at 25 °C), a capacitor to GND must be below 470 nF, and the pin can be left open for the default limit. |
| 7 | FB | input | Direct feedback, the inverting input of the internal transconductance error amplifier referenced to 3.2 to 3.4 V (3.3 V typ.) with respect to GND; tying FB to GND disables the E/A in isolated designs. |
| 8 | COMP | passive | Compensation node, the output of the internal error amplifier, which uses an RC network to GND for loop stability; in isolated designs it is driven directly by the optocoupler, and the burst mode threshold VCOMPL is 1.1 V typ. |
| 9 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 10 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 11 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 12 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 14 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 15 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 16 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
VIPER26HDTR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
viper26hdtr-etched.step/viper26hdtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper26hdtr.step/viper26hdtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (34 pp, sha256
396324b4060be48c, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# VIPER26HDTR
**STMicroelectronics** · AC-DC Controllers And Regulators · SO-16
VIPER26HDTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, connecting the source of the internal power MOSFET and the controller ground reference. |
| 2 | GND | power_in | Ground and MOSFET source, connecting the source of the internal power MOSFET and the controller ground reference (same net as pin 1). |
| 3 | N.C. | unconnected | Not connected; this pin can be soldered to GND. |
| 4 | N.A. | passive | Not available for user; it is mechanically connected to the controller die pad and should be connected to GND (pins 1, 2) to improve noise immunity. |
| 5 | VDD | power_in | Controller supply with an external storage capacitor to GND; operating range 11.5 to 23.5 V, startup threshold VDDon 12 to 14 V, undervoltage shutdown VDDoff 7 to 9 V, and a ~0.1 µF bypass capacitor recommended close to the IC. |
| 6 | LIM | input | Drain current limitation; an external resistor to GND lowers the current limit below the default IDlim (0.66 to 0.74 A at 25 °C), a capacitor to GND must be below 470 nF, and the pin can be left open for the default limit. |
| 7 | FB | input | Direct feedback, the inverting input of the internal transconductance error amplifier referenced to 3.2 to 3.4 V (3.3 V typ.) with respect to GND; tying FB to GND disables the E/A in isolated designs. |
| 8 | COMP | passive | Compensation node, the output of the internal error amplifier, which uses an RC network to GND for loop stability; in isolated designs it is driven directly by the optocoupler, and the burst mode threshold VCOMPL is 1.1 V typ. |
| 9 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 10 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 11 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 12 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 14 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 15 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
| 16 | DRAIN | passive | MOSFET drain with 800 V minimum breakdown; the internal high-voltage current source sinks startup charging current from this pin, and PCB copper under the DRAIN pins is needed for heat dissipation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `VIPER26HDTR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `viper26hdtr-etched.step` / `viper26hdtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `viper26hdtr.step` / `viper26hdtr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918026921631744) (34 pp, sha256 `396324b4060be48c`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/viper26hdtr-datasheet.pdf)