# VBQA2157N

**VBsemi Elec** · MOSFETs · DFN5x6-8

VBQA2157N from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the drain-source voltage is rated at -150 V. |
| 2 | S | passive | Source of the P-channel MOSFET, tied to the same net as pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied to the same net as pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET; the gate-source voltage is rated at ±20 V. |
| 5 | D | passive | Drain of the P-channel MOSFET; continuous drain current is -22 A at TC = 25 °C. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied to the same net as pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied to the same net as pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied to the same net as pins 5, 6 and 7. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | DFN5x6-8 |
| Category | Transistors/Thyristors |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -150 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID | -22 |  |  | A | TJ = 150 °C; TC = 25 °C | 1 |
| Continuous Drain Current | ID | -18 |  |  | A | TJ = 150 °C; TC = 70 °C | 1 |
| Continuous Drain Current | ID | -20 |  |  | A | TJ = 150 °C; TA = 25 °C | 1 |
| Continuous Drain Current | ID | -18.1 |  |  | A | TJ = 150 °C; TA = 70 °C; surface mounted on 1 in x 1 in FR4 board | 1 |
| Pulsed Drain Current | IDM | -45 |  |  | A |  | 1 |
| Avalanche Current Pulse | IAS |  |  | 12 | A | L = 0.1 mH | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 12 | mJ |  | 1 |
| Continuous Source-Drain Diode Current | IS |  |  | 7.5 | A | TC = 25 °C | 1 |
| Continuous Source-Drain Diode Current | IS |  |  | 2.4 | A | TA = 25 °C; surface mounted on 1 in x 1 in FR4 board | 1 |
| Maximum Power Dissipation | PD |  |  | 10 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation | PD |  |  | 7 | W | TC = 70 °C | 1 |
| Maximum Power Dissipation | PD |  |  | 1.3 | W | TA = 25 °C | 1 |
| Maximum Power Dissipation | PD |  |  | 2 | W | TA = 70 °C; surface mounted on 1 in x 1 in FR4 board | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 1 |
| Maximum Junction-to-Ambient | RthJA |  | 33 | 40 | °C/W | Steady state; surface mounted on 1 in x 1 in FR4 board | 1 |
| Maximum Junction-to-Case | RthJC |  | 0.98 | 1.2 | °C/W | Steady state | 1 |
| Drain-Source Breakdown Voltage | VDS | -150 |  |  | V | VGS = 0 V, ID = -250 µA | 2 |
| Gate-Source Threshold Voltage | VGS(th) | -1.5 |  | -3 | V | VDS = VGS, ID = -250 µA | 2 |
| Gate-Source Leakage | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | µA | VDS = -100 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -10 | µA | VDS = -120 V, VGS = 0 V, TJ = 55 °C | 2 |
| On-State Drain Current | ID(on) | -20 |  |  | A | VDS = -5 V, VGS = -10 V | 2 |
| Drain-Source On-State Resistance | RDS(on) |  |  | 0.065 | Ω | VGS = -10 V, ID = -5 A | 2 |
| Drain-Source On-State Resistance | RDS(on) |  |  | 0.07 | Ω | VGS = -4.5 V, ID = -5 A | 2 |
| Turn-On Delay Time | td(on) |  | 10 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Rise Time | tr |  | 7 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Turn-Off Delay Time | td(off) |  | 70 | 110 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Fall Time | tf |  | 40 | 60 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Total Gate Charge | Qg |  | 76 | 115 | nC | VDS = -30 V, VGS = -10 V, ID = -5 A | 2 |
| Total Gate Charge | Qg |  | 38 | 60 | nC | VDS = -30 V, VGS = -4.5 V, ID = -5 A | 2 |
| Body Diode Voltage | VSD | -1 |  | -1.5 | V | IS = -3 A | 2 |
| Body Diode Reverse Recovery Time | trr |  | 45 | 68 | ns | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 |
| Body Diode Reverse Recovery Charge | Qrr |  | 59 | 120 | nC | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 |
| VDS Temperature Coefficient | VDS/TJ |  | 68 |  | mV/°C | ID = -250 µA | 2 |
| VGS(th) Temperature Coefficient | VGS(th)/TJ |  | -5.2 |  | mV/°C |  | 2 |

## CAD (KiCad official)

- Symbol: `VBQA2157N`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN5x6-8 (KiCad packages3D, STEP)
- 3D model files: `vbqa2157n-etched.step` / `vbqa2157n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `vbqa2157n.step` / `vbqa2157n.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [VBsemi Elec datasheet](docs/vbqa2157n-datasheet.pdf) (7 pp, sha256 `c1e950b9e96a377c`, retrieved 2026-10-29, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/vbqa2157n-datasheet.pdf)