# VBPW34S

**Vishay Semiconductors** · Photodiodes · SMD, 4.4x3.9mm

VBPW34S from Vishay Semiconductors, in a SMD, 4.4x3.9mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). The symbol is generated from that pin table and the footprint is an Adom_Gen land derived from the manufacturer drawing; the 3D model is generated to fit it.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Cathode | passive | Cathode: the plain 1.6 mm lead (right in the p.4 top view), facing the sprocket holes on the p.6 tape ('CATHODE'). Number by convention; Vishay prints none. |
| 2 | Anode | passive | Anode: the lead necked to 0.8 mm at its tip (left in the p.4 top view). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Semiconductors |
| Package | SMD, 4.4x3.9mm |
| Category | Optoelectronics |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse voltage | VR |  |  | 60 | V |  | 1 |
| Power dissipation | PV |  |  | 215 | mW | Tamb ≤ 25 °C | 1 |
| Junction temperature | Tj |  |  | 100 | °C |  | 1 |
| Operating temperature range | Tamb | -40 |  | 100 | °C |  | 1 |
| Storage temperature range | Tstg | -40 |  | 100 | °C |  | 1 |
| Soldering temperature | Tsd |  |  | 260 | °C | Acc. reflow solder profile fig. 8 | 1 |
| Breakdown voltage | V(BR) | 60 |  |  | V | IR = 100 μA, E = 0 | 2 |
| Forward voltage | VF |  | 1 | 1.3 | V | IF = 50 mA | 2 |
| Reverse dark current | Iro |  | 2 | 30 | nA | VR = 10 V, E = 0 | 2 |
| Diode capacitance | CD |  | 25 | 40 | pF | VR = 3 V, f = 1 MHz, E = 0 | 2 |
| Reverse light current | Ira | 45 | 55 |  | μA | Ee = 1 mW/cm2, λ = 950 nm, VR = 5 V | 2 |
| Angle of half sensitivity | ϕ | -65 |  | 65 | deg |  | 2 |
| Range of spectral bandwidth | λ0.1 | 430 |  | 1100 | nm |  | 2 |
| Diode capacitance | CD |  | 70 |  | pF | VR = 0 V, f = 1 MHz, E = 0 | 2 |
| Open circuit voltage | Vo |  | 350 |  | mV | Ee = 1 mW/cm2, λ = 950 nm | 2 |
| Temperature coefficient of Vo | TKVo |  | -2.6 |  | mV/K | Ee = 1 mW/cm2, λ = 950 nm | 2 |
| Short circuit current | Ik |  | 50 |  | μA | Ee = 1 mW/cm2, λ = 950 nm | 2 |
| Temperature coefficient of Ik | TKIk |  | 0.1 |  | %/K | Ee = 1 mW/cm2, λ = 950 nm | 2 |
| Wavelength of peak sensitivity | λp |  | 940 |  | nm |  | 2 |
| Noise equivalent power | NEP |  | 4e-14 |  | W/√Hz | VR = 10 V, λ = 950 nm | 2 |
| Rise time | tr |  | 100 |  | ns | VR = 10 V, RL = 1 kΩ, λ = 820 nm | 2 |
| Fall time | tf |  | 100 |  | ns | VR = 10 V, RL = 1 kΩ, λ = 820 nm | 2 |
| Thermal resistance junction/ambient | RthJA |  | 350 |  | K/W |  | 1 |

## CAD (Adom-generated)

- Symbol: `VBPW34S`
- Footprint: `Adom_Gen:Vishay_Semiconductors_VBPW34_f42b60`
- 3D model: generated to fit the land (STEP)
- 3D model files: `vbpw34s-etched.step` / `vbpw34s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `vbpw34s.step` / `vbpw34s.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Semiconductors datasheet](docs/vbpw34s-datasheet.pdf) (8 pp, sha256 `33e4449b278380d4`, retrieved 2026-11-10, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** symbol generated from the datasheet pin table; footprint an Adom_Gen land derived from the manufacturer drawing. 3D model generated to fit that land.

[Datasheet PDF](docs/vbpw34s-datasheet.pdf)