UCC3813DTR-5

{
  "slug": "ucc3813dtr-5",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ucc3813dtr-5",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ucc3813dtr-5.kicad_sym",
    "ucc3813dtr-5.kicad_mod",
    "ucc3813dtr-5.glb",
    "ucc3813dtr-5.step",
    "ucc3813dtr-5.lbr",
    "docs/hero.png",
    "docs/ucc3813dtr-5-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ucc3813dtr-5-hero.glb",
    "ucc3813dtr-5-hero.overlay.json"
  ],
  "component": {
    "mpn": "UCC3813DTR-5",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "AC-DC Controllers And Regulators",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ucc3813-0",
    "parts": {
      "symbol": "ucc3813dtr-5.kicad_sym",
      "footprint": "ucc3813dtr-5.kicad_mod",
      "model_3d": "ucc3813dtr-5-hero.glb",
      "model_3d_plain": "ucc3813dtr-5.glb",
      "model_3d_step": "ucc3813dtr-5-etched.step",
      "model_3d_step_plain": "ucc3813dtr-5.step",
      "lbr": "ucc3813dtr-5.lbr"
    },
    "distributor_links": {
      "lcsc": "C702446",
      "digikey": "296-49286-2-ND",
      "mouser": "595-UCC3813DTR-5"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T02:27:26Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-49286-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-UCC3813DTR-5",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "COMP",
        "type": "output",
        "description": "COMP is the error amplifier output and the PWM comparator input, with loop compensation connected between COMP and FB; forcing COMP to GND externally specifies zero duty cycle."
      },
      {
        "number": "2",
        "name": "FB",
        "type": "input",
        "description": "FB is the inverting input of the error amplifier, and the FB trace should be kept as short as possible with minimal stray capacitance for best stability."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "CS is the input to the current-sense comparators (PWM and 1.5 V over-current), with 100 ns leading-edge blanking, and should connect directly to the MOSFET source sense resistor."
      },
      {
        "number": "4",
        "name": "RC",
        "type": "input",
        "description": "RC is the oscillator timing pin, where a resistor from REF and a capacitor to GND set frequency and maximum duty cycle; recommended RT is 10 kΩ to 200 kΩ and CT is 100 pF to 1000 pF, and RT must never be below 10 kΩ."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "GND is the reference and power ground for all device functions, and the signal return should be separated from the high-current gate driver return."
      },
      {
        "number": "6",
        "name": "OUT",
        "type": "output",
        "description": "OUT is the high-current totem-pole gate driver output, rated for peak source/sink current of ±750 mA (up to ±1 A) into a power MOSFET gate, and it is held actively low during UVLO."
      },
      {
        "number": "7",
        "name": "VCC",
        "type": "power_in",
        "description": "VCC is the bias supply input, with a 12 V absolute maximum from a low-impedance source (a series resistor is needed above 12 V to limit current into the internal ~13.5 V zener clamp) and should be bypassed to GND with a 0.1 µF ceramic capacitor close to the pin."
      },
      {
        "number": "8",
        "name": "REF",
        "type": "output",
        "description": "REF is the voltage reference output (4 V on the UCCx813-5 variant), limited to 5 mA output current and bypassed to GND with a ceramic capacitor of at least 0.1 µF placed close to the pin."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Datasheet Table 5-1 lists VCC as type 'I'; it is typed power_in here per KiCad convention for a supp; Datasheet lists REF as output (O) and it also supplies the internal logic; typed output. For the UCC; Pinout is taken from the Chinese translation of TI datasheet SLUS161 (ZHCSLD8G), Table 5-1 and Figur"
        ],
        "pages_sent": 37,
        "cost_usd": 0.2088,
        "at": "2026-10-08T02:27:11"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ucc3813-0",
        "pages": 53,
        "sha256": "e691a7fcf4f2163a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
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          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ucc3813dtr-5-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
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        "sha256": "035f89492ec767a36b48b3fc312e4bd2e993e23d621bf0e938a42d7f7d659e11",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}