component
UCC3813DTR-5
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC3813DTR-5
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC3813DTR-5 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and the PWM comparator input, with loop compensation connected between COMP and FB; forcing COMP to GND externally specifies zero duty cycle. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and the FB trace should be kept as short as possible with minimal stray capacitance for best stability. |
| 3 | CS | input | CS is the input to the current-sense comparators (PWM and 1.5 V over-current), with 100 ns leading-edge blanking, and should connect directly to the MOSFET source sense resistor. |
| 4 | RC | input | RC is the oscillator timing pin, where a resistor from REF and a capacitor to GND set frequency and maximum duty cycle; recommended RT is 10 kΩ to 200 kΩ and CT is 100 pF to 1000 pF, and RT must never be below 10 kΩ. |
| 5 | GND | power_in | GND is the reference and power ground for all device functions, and the signal return should be separated from the high-current gate driver return. |
| 6 | OUT | output | OUT is the high-current totem-pole gate driver output, rated for peak source/sink current of ±750 mA (up to ±1 A) into a power MOSFET gate, and it is held actively low during UVLO. |
| 7 | VCC | power_in | VCC is the bias supply input, with a 12 V absolute maximum from a low-impedance source (a series resistor is needed above 12 V to limit current into the internal ~13.5 V zener clamp) and should be bypassed to GND with a 0.1 µF ceramic capacitor close to the pin. |
| 8 | REF | output | REF is the voltage reference output (4 V on the UCCx813-5 variant), limited to 5 mA output current and bypassed to GND with a ceramic capacitor of at least 0.1 µF placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC3813DTR-5 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc3813dtr-5-etched.step/ucc3813dtr-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc3813dtr-5.step/ucc3813dtr-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
e691a7fcf4f2163a, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).