component
UCC3580DTR-3
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
ucc3580dtr-3: specified limits as data (metadata.characteristics, 59 rows from the datasheet)
1b6589b
17d ago
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"slug": "ucc3580dtr-3",
"title": "UCC3580DTR-3",
"brief": "Texas Instruments DC-DC Converters, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
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"factory-2.0.0",
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"mpn": "UCC3580DTR-3",
"manufacturer": "Texas Instruments",
"package": "SOIC-16",
"pin_count": 16,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://www.ti.com/cn/lit/gpn/ucc3580-1",
"parts": {
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"model_3d_step_plain": "ucc3580dtr-3.step",
"lbr": "ucc3580dtr-3.lbr"
},
"distributor_links": {
"lcsc": "C2658623",
"digikey": "UCC3580DTR-3-ND",
"mouser": "595-UCC3580DTR-3"
},
"distributor_check": {
"checked_at": "2026-10-12T04:29:02Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "UCC3580DTR-3-ND",
"status": "found",
"lifecycle": "Active"
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"status": "found"
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},
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{
"number": "1",
"name": "DELAY",
"type": "passive",
"description": "A resistor from DELAY to GND programs the nonoverlap delay between OUT1 and OUT2 (Delay1 and Delay2)."
},
{
"number": "2",
"name": "LINE",
"type": "input",
"description": "Hysteretic comparator input with thresholds of 5.0V and 4.5V, used to sense input line voltage and turn off OUT1 when the line is low."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Chip power supply pin, bypassed to PGND, with a 15V shunt clamp to GND (sinks up to 10mA); the -3 version starts above 9V and runs above 8.5V."
},
{
"number": "4",
"name": "OUT1",
"type": "output",
"description": "Gate drive output for the main switch, capable of sourcing up to 0.5A and sinking 1A."
},
{
"number": "5",
"name": "PGND",
"type": "power_in",
"description": "Ground connection for the gate drivers, connected to GND at a single point so no high frequency switching currents flow in the ground plane."
},
{
"number": "6",
"name": "OUT2",
"type": "output",
"description": "Gate drive output for the auxiliary switch with 0.3A drive current capability; inverted (drives NMOS) in the -3 version."
},
{
"number": "7",
"name": "CLK",
"type": "output",
"description": "Oscillator clock output from a low impedance CMOS driver, high during guaranteed off time, and able to synchronize up to five other UCC3580 PWMs."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Signal ground."
},
{
"number": "9",
"name": "RAMP",
"type": "input",
"description": "Feedforward ramp input programmed by a resistor R4 to input voltage and capacitor CR to GND; the flux comparator limits it at 3.3V (volt-second clamp = 3.3 x R4 x CR)."
},
{
"number": "10",
"name": "OSC2",
"type": "passive",
"description": "Oscillator programming pin; a resistor to the timing capacitor controls guaranteed off time and, together with OSC1, sets frequency."
},
{
"number": "11",
"name": "OSC1",
"type": "passive",
"description": "Oscillator programming pin; a resistor to the timing capacitor sets maximum on time and, together with OSC2, sets frequency."
},
{
"number": "12",
"name": "EAOUT",
"type": "output",
"description": "Error amplifier output and input to the PWM comparator, where loop compensation components connect from EAOUT to EAIN."
},
{
"number": "13",
"name": "EAIN",
"type": "input",
"description": "Inverting input to the error amplifier (noninverting input internally set to 2.5V), used for feedback and loop compensation."
},
{
"number": "14",
"name": "REF",
"type": "power_out",
"description": "Precision 5.0V reference that can supply up to 5mA to external circuits, bypassed to GND with a 1uF capacitor."
},
{
"number": "15",
"name": "SS",
"type": "passive",
"description": "A capacitor from SS to ground programs the soft start time; EAOUT follows the SS ramp until regulation is achieved."
},
{
"number": "16",
"name": "SHTDWN",
"type": "input",
"description": "Comparator input with 0.5V threshold that stops the chip, forcing OUT1 low while OUT2 continues to oscillate."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text+vision",
"consensus_model": "claude-opus-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN suffix -3 is the UCC3580 -3 version (9V UVLO on, OUT2 inverted); pin types for DELAY, OSC1, OSC2",
"vision extraction: provenance cannot be text-verified; needs consensus"
],
"pages_sent": 16,
"cost_usd": 0.4261,
"at": "2026-10-12T04:28:47"
},
"datasheet": {
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"pages": 16,
"sha256": "22578373a5379f7a",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
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"described": 16,
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}
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{
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},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-16",
"Category": "Power Management (PMIC)",
"Pins": "16"
},
"characteristics": {
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"source": "datasheet",
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"rows": [
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{
"name": "Maximum Duty Cycle",
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{
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{
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{
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{
"name": "VDD On (UCC3580-1,-3)",
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{
"name": "ILINE",
"symbol": "ILINE",
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{
"name": "VDD Clamp",
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"min": 14,
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"conditions": "IVDD = 10 mA",
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{
"name": "IVDD Start",
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{
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{
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{
"name": "OUT1 VSAT Low",
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{
"name": "OUT2 VSAT High",
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{
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{
"name": "OUT1 Fall Time",
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{
"name": "OUT1 Rise Time",
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{
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{
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{
"name": "Delay 1 OUT2 to OUT1",
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"conditions": "R3 = 100 k, COUT1 = COUT2 = 15 pF",
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{
"name": "Delay 1 OUT2 to OUT1 (TA = TJ = 25 C)",
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{
"name": "REF",
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{
"name": "Line Regulation",
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"conditions": "VDD = 10 V to 14 V",
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{
"name": "VDD",
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{
"name": "LINE, RAMP",
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