component
UCC28C52DR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownUCC28C52DR
Texas Instruments · DC-DC Converters · SOIC-8
UCC28C52DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output for compensation, internally current limited so zero duty cycle can be commanded by forcing COMP to GND. |
| 2 | FB | input | Inverting input of the error amplifier whose noninverting input is internally trimmed to 2.5 V ± 1%, used for the voltage-feedback loop. |
| 3 | CS | input | Primary-side current sense input to the PWM comparator, connected to the current sensing resistor, with a typical gain of 3 V/V. |
| 4 | RT/CT | bidirectional | Fixed-frequency oscillator set point, with timing resistor to VREF and timing capacitor to GND setting the switching frequency. |
| 5 | GND | power_in | Ground return pin for the output driver stage and the logic level controller section. |
| 6 | OUT | output | On-chip gate drive output sourcing and sinking up to 1 A peak, at oscillator frequency and near 100% duty cycle on the UCC28C52, and actively held low when VDD is below the turn-on threshold. |
| 7 | VDD | power_in | Analog controller bias input with 30 V absolute maximum, requiring a 0.1 µF bypass capacitor to GND. |
| 8 | VREF | power_out | 5-V reference output (±1%) that charges the timing capacitor through the timing resistor, requiring at least a 0.1 µF ceramic bypass to GND and 55 mA maximum short-circuit current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VREF voltage, initial accuracy | VVREF | 4.95 | 5 | 5.05 | V | TJ = 25°C, IOUT = 1 mA | 7 |
| VREF total output variation | 4.85 | 5.15 | V | 7 | |||
| VREF output short circuit current | IVREF | 30 | 45 | 55 | mA | Output short circuit (source current) | 7 |
| Oscillator initial accuracy | fOSC | 50.5 | 53 | 55 | kHz | TJ = 25°C | 7 |
| Feedback input voltage, initial accuracy | VFB | 2.475 | 2.5 | 2.525 | V | VCOMP = 2.5 V, TJ = 25°C | 7 |
| Feedback input voltage, total variation | VFB | 2.45 | 2.5 | 2.55 | V | VCOMP = 2.5 V | 7 |
| Current sense gain | ACS | 2.85 | 3 | 3.15 | V/V | 7 | |
| Current sense maximum input signal | VCS | 0.9 | 1 | 1.1 | V | VFB < 2.4 V | 7 |
| Start threshold | VDDON | 13.5 | 14.5 | 15.5 | V | UCCx8C52 | 8 |
| Minimum operating voltage | VDDOFF | 8 | 9 | 10 | V | UCCx8C52 | 8 |
| Maximum duty cycle | DMAX | 94 | 96 | % | VFB < 2.4 V | 8 | |
| Start-up current | ISTART-UP | 50 | 75 | µA | VVDD = VDDON, 0.5 V | 8 | |
| Operating supply current | IVDD | 1.3 | 2 | mA | VFB = VCS = 0 V | 8 | |
| Input voltage | VDD | 30 | V | 5 | |||
| Input current | IVDD | 30 | mA | 5 | |||
| Output drive current (peak) | -1 | 1 | A | 5 | |||
| Output energy (capacitive load) | EOUT | 5 | µJ | 5 | |||
| Analog input voltage | -0.3 | 6.3 | V | COMP, CS, FB, RT/CT | 5 | ||
| Output driver voltage | OUT | -0.3 | 30 | V | OUT | 5 | |
| Reference voltage | VREF | 7 | V | 5 | |||
| Error amplifier output sink current | 10 | mA | COMP | 5 | |||
| Lead temperature | TLEAD | 300 | °C | soldering, 10 s | 5 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage | VVDD | 28 | V | 6 | |||
| Output driver voltage | VOUT | 28 | V | 6 | |||
| Average output driver current | IOUT | 200 | mA | 6 | |||
| Reference output current | IOUT(VREF) | -20 | mA | 6 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | UCC28C5x | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 128.9 | °C/W | D (SOIC) 8 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 71.7 | °C/W | D (SOIC) | 6 | ||
| Junction-to-board thermal resistance | RθJB | 72.3 | °C/W | D (SOIC) | 6 | ||
| Junction-to-top characterization parameter | ψJT | 23.4 | °C/W | D (SOIC) | 6 | ||
| Junction-to-board characterization parameter | ψJB | 71.5 | °C/W | D (SOIC) | 6 | ||
| HBM ESD | V(ESD) | -2500 | 2500 | V | Human-body model | 6 | |
| CDM ESD | V(ESD) | -1500 | 1500 | V | Charged-device model | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | The inductor rising slope (Sn) at the CS pin is calculated with Equation 34. Sn = | 34 |
CAD (KiCad official)
- Symbol:
UCC28C52DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc28c52dr-etched.step/ucc28c52dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc28c52dr.step/ucc28c52dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (58 pp, sha256
d9b2cab289f0aa82, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).