component
UCC28500DW
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"mpn": "UCC28500DW",
"manufacturer": "Texas Instruments",
"package": "SOIC-20-300mil",
"pin_count": 20,
"category": "Power Management (PMIC)",
"subcategory": "AC-DC Controllers And Regulators",
"datasheet": "https://www.ti.com/cn/lit/gpn/ucc38503",
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"distributor_links": {
"lcsc": "C2859883",
"digikey": "2156-UCC28500DW-ND",
"mouser": "595-UCC28500DW"
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"pins": [
{
"number": "1",
"name": "VAOUT",
"type": "output",
"description": "Voltage amplifier output that regulates the output voltage and is internally limited to approximately 5.5 V to prevent overshoot."
},
{
"number": "2",
"name": "RT",
"type": "passive",
"description": "Oscillator charging-current programming pin; a resistor from RT to GND sets the charging current, with 10 kΩ to 100 kΩ recommended and a nominal pin voltage of 3 V."
},
{
"number": "3",
"name": "VSENSE",
"type": "input",
"description": "Inverting input of the voltage amplifier, normally connected to the compensation network and to the boost output through a divider network."
},
{
"number": "4",
"name": "OVP/ENBL",
"type": "input",
"description": "Window-comparator input that disables the PFC driver if the boost output is 6.67% above nominal, disables both drivers and resets SS2 if pulled below 1.9 V, and sets the active range of the second-stage PWM."
},
{
"number": "5",
"name": "CT",
"type": "passive",
"description": "Oscillator timing capacitor pin; a capacitor from CT to GND, with RT, sets the oscillator frequency, and its return lead should be as short as possible."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Ground reference for all voltages; VCC and VREF should be bypassed directly to GND with a 0.1 µF or larger ceramic capacitor."
},
{
"number": "7",
"name": "VERR",
"type": "input",
"description": "Error-signal input for the second stage, driven by an external amplifier, with an internal 4.5 V clamp that limits GT2 to less than 50% duty cycle."
},
{
"number": "8",
"name": "ISENSE2",
"type": "input",
"description": "Second-stage current-sense input, fed by a resistor from the lower FET source to ground, which may also sum the oscillator ramp for slope compensation."
},
{
"number": "9",
"name": "VCC",
"type": "power_in",
"description": "Positive supply, to be connected to at least 20 mA between 12 V and 17 V for normal operation, bypassed directly to GND, and with outputs inhibited unless VCC exceeds the upper UVLO threshold."
},
{
"number": "10",
"name": "GT2",
"type": "output",
"description": "Totem-pole MOSFET gate-drive output for the second stage, limited to a 50% maximum duty cycle."
},
{
"number": "11",
"name": "PWRGND",
"type": "power_in",
"description": "Ground return for the totem-pole output drivers."
},
{
"number": "12",
"name": "GT1",
"type": "output",
"description": "Totem-pole MOSFET gate-drive output for the PFC stage, which requires a series gate resistor of at least 10.5 Ω to limit overshoot."
},
{
"number": "13",
"name": "SS2",
"type": "passive",
"description": "Soft-start pin for the second-stage PWM, charged by an external capacitor through a current source and quickly discharged on a disable command or UVLO2 dropout."
},
{
"number": "14",
"name": "PKLMT",
"type": "input",
"description": "PFC peak current-limit input with a 0 V threshold, where a level-shift divider from the current-sense resistor to VREF sets the overcurrent level."
},
{
"number": "15",
"name": "CAOUT",
"type": "output",
"description": "Output of the wide-bandwidth current amplifier that commands the PFC PWM duty cycle and can swing close to GND to allow zero duty cycle."
},
{
"number": "16",
"name": "ISENSE1",
"type": "input",
"description": "Non-inverting input of the current amplifier, which remains functional down to and below GND."
},
{
"number": "17",
"name": "MOUT",
"type": "input",
"description": "Multiplier output and inverting input of the current amplifier, a high-impedance node to which current-loop compensation connects between MOUT and CAOUT."
},
{
"number": "18",
"name": "IAC",
"type": "input",
"description": "Analog multiplier current input used to sense instantaneous line voltage, with a recommended maximum of 500 µA."
},
{
"number": "19",
"name": "VFF",
"type": "output",
"description": "RMS feed-forward signal generated by mirroring one-half of IAC into a single-pole external filter, which should be 1.4 V at low line."
},
{
"number": "20",
"name": "VREF",
"type": "power_out",
"description": "Accurate 7.5 V reference output capable of supplying 10 mA to peripheral circuitry, internally short-circuit current limited, and bypassed to GND with 0.1 µF or larger ceramic."
}
],
"provenance": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin types for RT, CT, SS2, MOUT and VFF are not stated as ERC classes in the datasheet; they were as; Pin numbers were taken from the DW top-view listing on page 2 and cross-checked against the block di; The page 27 package addendum lists UCC28500DW with status NRND (not recommended for new designs). Th"
],
"pages_sent": 11,
"cost_usd": 0.0921,
"at": "2026-10-08T23:09:50"
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"url": "https://www.ti.com/cn/lit/gpn/ucc38503",
"pages": 36,
"sha256": "5eaadcc6a0fa5e00",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"Package": "SOIC-20-300mil",
"Category": "Power Management (PMIC)",
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